
18
Am79C985
P R E L I M I N A R Y
Notes:
1. CRS = Carrier Sense, COL = Collision, JAB = Jabber, LINK = Link, LB = Loop Back, PAR = Partition, DIS = Port Disabled,
blk = Blink (Number = period of Blink).
2. For the LDC
0-2
setting of 000: If the port is partitioned, the LINK LED is off.
3. All LEDs blink 16 times at 260 ms per blink after reset.
4. All LEDs are on for approximately 4 seconds after reset.
5. LDC
0-2
= ‘010’ and ‘011’ are undefined.
The LEDs can also be controlled via the management
port. The Enable Software Override commands turn
the LEDs on regardless of the attributes selected for
display through the LDC setting. Enable Software
Override of Bank A LEDs causes the LDA
pins to be driven LOW, and Enable Software Override
of Bank B LEDs causes the LDB
be driven LOW. The blink rate is set by the Software
Override LED Blink Rate command. The periods are
off, 512 ms, 1560 ms, or solid on.
0-4
and LDGA
0-4
and LDGB pins to
LED software override is executed in two stages, by
first issuing the blink rate (Software Override of LED
Blink Rate) and then issuing the command to enable
the particular port LEDs (Enable Software Override of
Bank A/B LEDs). All port combinations selected for
software override control will reference the blink rate
last issued by the Software Override of the LED Blink
Rate command.
LDA
put drivers that sink 12 mA of current to turn on the
LEDs. In a multiple eIMR+ configuration, the outputs
from the global LED drivers (LDGA and LDGB) of each
chip can be tied together to drive a single pair of global
status LEDs.
0-4
, LDB
0-4
, LDGA, and LDGB are open drain out-
CRS and COL are extended to make it easier for visual
recognition; that is, they will remain active for some
time even if the corresponding condition has expired.
Once carrier sense is active, CRS will remain active for
a minimum of 4 ms. Once a collision is detected, COL
is active for at least 4 ms. The exception to this rule is
for selection LDC
0-2
= 111. For this selection, COL is
stretched to 100
μ
s.
When LDC
tribute (LB) for the AUI port is displayed on LDA
true when DO on the MAU is successfully looped back
to DI on the AUI port. LB is false (off) if a loopback error
is detected, or if the AUI port is disabled or in the re-
verse mode. Transmit carrier sense is sampled at the
end of packet to determine the state of LB. The state of
LB remains latched until carrier sense is sampled again
for the next packet. The default/power-up state for LB is
false (off).
0-2
= 000 or LDC
0-2
= 001, the loopback at-
0
. LB is
Figure 1 shows the recommended connection of LEDs.
When LDA
0-4
, LDB
0-4
, LDGA, or LDGB are LOW, the
LED lights.
Figure 1. Visual Monitoring Application—Direct
LED Drive
Table 2. LED Attribute-Monitoring Program Options
LED Control
LDC
2
LDC
0
0
0
0
1
Global LEDs
LDGA
CRS
CRS
TP LEDs
AUI LEDs
1
LDC
0
1
0
1
0
0
LDGB
COL
COL
LDA
1-4
LDB
PAR
CRS
1-4
LDA
LB
LB
0
LDB
PAR
CRS
0
0
0
1
1
0
LINK (Note 2)
LINK
Reserved (Note 5)
Reserved (Note 5)
LINK
CRS 260-ms blk
LINK (Note 3)
CRS 512-ms blk
LINK
CRS 130-ms blk
CRS 260-ms blk
COL
COL 260-ms blk
JAB
PAR
COL 260-ms blk
PAR (Note 3)
CRS 260-ms blk
(Note 3)
CRS 512-ms blk
PAR
COL 260-ms blk
PAR (Note 3)
1
0
1
1
1
0
CRS
COL
PAR or DIS
CRS 130-ms blk
PAR or DIS
1
1
1
CRS
COL
LINK (Note 4)
PAR 1.56-s blk
COL (Note 4)
(Note 4)
PAR 1.56-s blk
PAR (Note 4)
eIMR+
LED
Interface
LDA[4:0]
LDB[4:0]
LDGA
LDGB
R
V
DD
Typical
20651B-6