參數(shù)資料
型號: AM79C988
廠商: Advanced Micro Devices, Inc.
英文描述: Quad Integrated Ethernet Transceiver (QuIET⑩)
中文描述: 四路集成以太網(wǎng)收發(fā)器(安靜⑩)
文件頁數(shù): 16/25頁
文件大?。?/td> 184K
代理商: AM79C988
16
Am79C988A
P R E L I M I N A R Y
ABSOLUTE MAXIMUM RATINGS
Storage Temperature. . . . . . . . . . . . . –65
°
C to +150
°
C
Ambient Temperature Under Bias. . . . . . . . . 0 to 70
°
C
Supply Voltage referenced to
AV
SS
or DV
SS
(AV
DD
, DV
DD
) . . . . . . . . . . . . . .–0.3 to +6V
Stresses above those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent device failure. Functionality
at or above these limits is not implied. Exposure to Absolute
Maximum Ratings for extended periods may affect device re-
liability. Programming conditions may differ.
OPERATING RANGES
Commercial (C) Devices
Temperature (TA) . . . . . . . . . . . . . . . . . .0
°
C to + 70
°
C
Supply Voltages (V
DD
). . . . . . . . . . . . . . . . . +5 V
±
5%
Operating ranges define those limits between which the
functionality of the device is guaranteed.
DC CHARACTERISTICS over operating ranges unless otherwise specified
Parameter
Symbol
Digital I/O
V
IL
V
IH
V
OL
V
OH
I
IH
Parameter Description
Test Conditions
Min
Max
Unit
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Input Leakage Current HIGH (DIR,
SDATA, CLK, RST)
Input Leakage Current LOW (DIR,
SDATA, CLK, TEST)
Input Leakage Current HIGH (TEST)
Input Leakage Current LOW (RST)
DV
SS
= 0.0 V
-0.5
2.0
-
2.4
-
0.8
V
V
V
V
μ
A
DV
DD
+0.5
0.4
-
10
I
OL
=4.0 mA
I
OH
=-0.4 mA
0<V
IN
<DV
DD
I
IL
0V<V
IN
<DV
DD
-
-10
μ
A
I
ILDH
I
ILDL
0<V
IN
<DV
DD
0V<V
IN
<DV
DD
-
-
500
-500
μ
A
μ
A
PAUI Ports
V
POH
V
POL
V
PIH
V
PIL
I
PILH
I
PILL
V
PASQ
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage Current HIGH
Input Leakage Current LOW
PDO Squelch (the value PDO must go to
before internal PDO carrier sense can be
turned on)
Twisted Pair Ports
I
IRXD
Input Current at RXD
±
R
RXD
RXD Differential Input Resistance
V
TIVB
RXD
±
, Open Circuit Input Voltage
(Bias)
V
TIDV
Differential Mode Input Voltage Range
(RXD)
V
TSQ+
RXD Positive Squelch Threshold
(Peak)
V
TSQ-
RXD Negative Squelch Threshold
(Peak)
V
THS+
RXD Post-Squelch Positive Threshold
(Peak)
V
THS-
RXD Post-Squelch Negative Threshold
(Peak)
PAUI Mode
PAUI Mode
PAUI Mode
PAUI Mode
AV
DD
= MAX
AV
DD
= MAX
V
DD/2
+ 0.45
-
V
DD/2
+ 0.45
-
-
-
V
DD/2
- 0.400 V
DD/2
- 0.175
-
V
V
V
V
μ
A
μ
A
mV
V
DD/2
- 0.45
-
V
DD/2
- 0.45
10
-10
AV
SS
<V
IN
<AV
DD
(Note 1)
I
IN
= 0 mA
-500
10
500
-
μ
A
k
V
AV
DD
-3.0
AV
DD
-1.5
AV
DD
= 5.0 V
-3.1
3.1
V
Sinusoid 5 MHz <f< 10 MHz
300
520
mV
Sinusoid 5 MHz <f< 10 MHz
-520
-300
mV
Sinusoid 5 MHz <f< 10 MHz
120
293
mV
Sinusoid 5 MHz <f< 10 MHz
-293
-120
mV
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