參數資料
型號: AM79D2251VC
廠商: ADVANCED MICRO DEVICES INC
元件分類: 編解碼器
英文描述: Dual Intelligent Subscriber Line Audio-Processing Circuit (ISLAC)
中文描述: PCM CODEC, PQFP44
封裝: PLASTIC, TQFP-44
文件頁數: 30/35頁
文件大?。?/td> 410K
代理商: AM79D2251VC
30
Am79D2251
Figure 19. PCM Highway Timing for XE = 1 (Transmit on Positive PCLK Edge)
Time Slot Zero, Clock Slot Zero
GCI Timing Specifications
Notes:
1. The Data Clock (DCL) can be stopped in the high or low state without loss of information.
2. A temporary stoppage of DCL must not put the ISLAC into a state in which it does not respond to a software
reset command.
3. All frequency-dependent specifications are guaranteed for clock frequencies within ±100 PPM from
nominal.
Symbol
t
R
, t
F
t
DCL
Signal
DCL
Parameter
Min
Typ
Max
60
Unit
Rise/fall time
ns
DCL
Period, F
DCL
= 2048 kHz
F
DCL
= 4096 kHz
Pulse width
478
239
498
249
t
WH
, t
WL
t
R
, t
F
t
SF
t
HF
t
WFH
t
DDC
t
DDF
t
SD
t
HD
DCL
90
FS
Rise/fall time
60
FS
Setup time
70
t
DCL
50
FS
Hold time
50
FS
High pulse width
130
DU
Delay from DCL edge
100
DU
Delay from FS edge
150
DD
Data setup
twH+20
DD
Data hold
50
PCLK
FS
First
Bit
Second
Bit
V
IL
V
IH
V
IL
V
IH
26
24
23
27
22
25
28
34
35
DRA
33
30
First
Bit
DXA
V
OL
V
OH
TSCA
See Note 4
31
32
29
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