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參數(shù)資料
| 型號： | AMB0480xxRH8 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM MODULES |
| 中文描述： | 高級內(nèi)存緩沖的全緩沖DIMM模塊 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大小： | 264K |
| 代理商： | AMB0480XXRH8 |
10
COMMERCIAL TEMPERATURE RANGE
IDTAMB0480
ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM
PIN DESCRIPTION
Signal
Channel Interface
PN[13:0]
PN
[13:0]
SN[13:0]
Type
Description
O
O
I
Northbound Output Data: High speed serial signal. Read path fromAMB toward host on primary side of the DIMM connector.
Northbound Output Data Complement
Northbound Input Data: High speed serial signal. Read path fromthe previous AMB toward this AMB on secondary side of the DIMM
connector.
Northbound Input Data Complement
Southbound Input Data: High speed serial signal. Write path fromhost toward AMB on primary side of the DIMM connector.
Southbound Input Data Complement
Southbound Output Data: High speed serial signal. Write path fromthis AMB toward next AMB on secondary side of the DIMMconnector.
These output buffers are disabled for the last AMB on the channel.
Southbound Output Data Complement
External 100
Ω
precision resistor connected to V
CC
. On-die termnation calibrated against this resistor.
SN
[13:0]
PS[9:0]
PS
[9:0]
SS[9:0]
I
I
I
O
SS
[9:0]
FBDRES
O
A
DRAMInterface
CB[7:0]
DQ[63:0]
DQS[17:0]
DQS
[17:0]
A0A-A15A,
A0B-A15B
BA0A-BA2A,
BA0B-BA2B
RASA
,
RASB
CASA
,
CASB
WEA
,
WEB
CS
0A-
CS
1A,
CS
0B-
CS
1B
I/O
I/O
I/O
I/O
O
Check bits
Data
Data Strobe: DDR2 data and check-bit strobe.
Data Strobe Complement: DDR2 data and check-bit strobe complements.
Address: Used for providing multiplexed row and column address to SDRAM.
O
Bank Active: Used to select the bank within a rank.
O
O
O
O
Row Address Strobe: Used with
CS
,
CAS
, and
WE
to specify the SDRAM command.
Column Address Strobe: Used with
CS
,
RAS
, and
WE
to specify the SDRAM command.
Write Enable: Used with
CS
,
CAS
, and
RAS
to specify the SDRAM command.
Chip Select: Used with
CAS
,
RAS
, and
WE
to specify the SDRAM command. These signals are used for selecting one of two SDRAM
ranks.
CS0
is used to select the first rank and
CS1
is used to select the second rank.
Clock Enable: DIMM command register enable.
CKE0A-CKE1A,
CKE0B-CKE1B
ODT0A, ODT0B
CLK[3:0]
CLK
[3:0]
DDR Compensation
DDRC_C14
DDRC_B18
DDRC_C18
DDRC_B12
DDRC_C12
O
O
O
O
DIMM On-Die-Termnation: Dynamc ODT enables for each DIMM on the channel.
Clock: Clocks to DRAMs. CLK0 and CLK1 are always used. CLK2 and CLK3 are used when the AMB is configured for dual rank DIMMs.
Clock Complement: Clocks to DRAMs.
A
A
A
A
A
DDR Compensation Common: Common return (ground) pin for DDRC_B18 and DDRC_C18
DDR Compensation Ball Resistor (825
Ω
) connected to Compensation Common above
DDR Compensation Ball Resistor (121
Ω
) connected to Compensation Common above
DDR Compensation Ball Resistor (82
Ω
) connected to V
SS
DDR Compensation Ball Resistor (82
Ω
) connected to V
DD
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AMB0480XXRJ | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM MODULES |
| AMB0480XXRJ8 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM MODULES |
| AMB0482C1RJ | 功能描述:緩沖器和線路驅(qū)動器 RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| AMB0482C1RJ8 | 功能描述:緩沖器和線路驅(qū)動器 RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| AMB0483D0RJ | 制造商:Integrated Device Technology Inc 功能描述:ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM (D0). BGA655 - Rail/Tube |
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