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| 型號(hào)： | AMD-640CHIPSET |
| 英文描述： | Peripheral IC |
| 中文描述： | 外圍芯片 |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 377K |
| 代理商： | AMD-640CHIPSET |
3
21340A/0—April 1997
AMD-640 Chipset I/O Model
Figure 1. Modeling Example of Typical PCB Net
After the simulator has loaded the net input file, the simulator
can be instructed to generate a rising or falling transition at the
driver input to the chipset driver (point ‘A’ in Figure 1). This
signal generator is represented in Figure 1 by the voltage
source input to the chipset driver.
Setup and Hold Times
For each signal transition, the simulator can determine the
signal propagation delay from point ‘A’ to point ‘B’ under
worst-case, typical, and best-case conditions. The propagation
delay under worst-case conditions is used to determine if the
setup time at the destination receiver is met. Likewise, the
progagation delay under best-case conditions is used to
determine if the hold time at the destination receiver is met.
Figure 2 illustrates the timings that must be considered when
determining whether the setup time of a signal is met. The
timings are defined as follows:
I
T
period
is the period of the system clock
T
skew
is the maximum clock skew between the clock that
launches a signal (solid-line clock) and the clock that
captures a signal (dashed-line clock)
T
jitter
(not shown in Figure 2) is the maximum variance
allowance between successive periods of the system clock
I
I
+
–
V
CC
R
1
R
2
A
B
AMD-640 Chipset
System Logic
PCB Trace
Driver
Receiver
Z
o
Voltage
Source
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| AMD-751 | AMD-751 - AMD-751 System Controller Revision Guide |
| AMD-756 | AMD-756? Peripheral Bus Controller Revision Guide |
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| AMD-760MP | AMD-760 MP - AMD-760 MP Chipset Overview |
相關(guān)代理商/技術(shù)參數(shù) |
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| AMD-751 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:AMD-751 - AMD-751 System Controller Revision Guide |
| AMD-751AC | 制造商:Advanced Micro Devices 功能描述:SYSTEM CONTROLLER, 492 Pin, BGA |
| AMD-756 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:AMD-756? Peripheral Bus Controller Revision Guide |
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