參數(shù)資料
型號: AME811CPL
廠商: AME, Inc.
元件分類: 顯示驅動器
英文描述: 3-1/2 Digit A/D Converter - Low Power With HOLD And Differential Reference Inputs
中文描述: 3-1/2位A / D轉換-低的持有和差分基準輸入功率
文件頁數(shù): 9/15頁
文件大?。?/td> 905K
代理商: AME811CPL
Analog Microelectronics, Inc.
9
AME811/AME811A/AME811R
3-1/2 Digit A/D Converter - Low Power
With HOLD And Differential Reference Inputs
n
Digital Section
Digital Ground
AME811 generates an internal digital ground, typically
5V below the V+.
Clock Circuit
The clock can be generated in either of the following
three methods.
1. An external oscillator connected to “OSC1”
2. A crystal between pins “OSC1” and “OSC2”
3. A R-C oscillator using “OSC1”, “OSC2” and
“OSC3”
Notes: There is no on-chip feedback resister across
osc1 and osc2.
Systems Timing
The oscillator frequency is divided by 4 prior to clock-
ing the internal decade counters. Each conversion
takes 4000 counts or 16000 oscillator clock pulses.
The timing of each phase are as follows:
For signals less than full-scale, the unused reference
integration time is assigned to the autozero phase.
Segment Drivers
The backplane frequency is 1/800 of the oscillator clock
frequency. For example if the oscillator frequency is
48 KHz (3 conversions per second) the backplane fre-
quency will be 60 Hz. The segment and backplane are
at the same frequency with a nominal 5 volt amplitude.
The segment is visible (ON) when the segment and the
backplane are out of phase, otherwise it is invisible
(OFF). The polarity segment is “ON” for negative ana-
log inputs. When the TEST pin on the AME811 is pulled
to V+, all segments are turned “ON”. The display reads
-1888. During this mode the LCD segments have a
constant DC voltage impressed.
DO NOT LEAVE THE
DISPLAY IN THIS MODE FOR MORE THAN SEV-
ERAL MINUTES!
LCD displays may be destroyed if
operated with DC levels for extended periods.
Auto-Zero Phase:
Signal Integration Phase:
Reference Integration Phase : 0 to 2000 Counts
1000 to 3000 Counts
1000 Counts (Fixed)
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