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參數(shù)資料
| 型號： | AMIS-734512 |
| 元件分類： | 光敏二極管 |
| 英文描述： | PHOTO DIODE |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 241K |
| 代理商： | AMIS-734512 |
AMIS-734256, AMIS-734512, AMIS-734024
Data Sheet
25m-pitch Wide Aperture Spectroscopic Photodiode Arrays
8.0 Clock and Voltage Requirements
The clocking requirements are relatively simple. As it was indicated in Figure 5 and Table 1, there are only two input signals that require
clocked inputs. They are CLK, the clock for the shift register, and START, the shift register start pulse. The timing specifications and the
symbol definition for Figure 6 are listed in Table 2. The control clock amplitudes for I/Os are compatible with the 5V CMOS devices.
Figure 6: Timing Diagram
Table 2: Symbol Definitions and Timing Specifications for Timing Diagram
Item
Symbol
Min.
Typ.
Max.
Units
Clock cycle time
to
1000
10000
ns
Clock high pulse width
twh
900
ns
Clock low pulse width
twl
100
ns
Clock duty cycle
1
50
99
%
Data setup time
tds
100
ns
Data hold time
tdh
100
ns
EOS low-to-high delay
telh
400
ns
EOS high-to-low delay
tehl
400
ns
Signal delay time
tsd
50
ns
Signal settling time
tsh
900
ns
Signal settle to clock edge
tsch
0
ns
6
AMI Semiconductor – Aug. 06, M-20603-001
www.amis.com
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