
Application Note
Appendix B — CPU05 and CPU08 512-Byte Table Indexing Code
AN1218 Rev. 2
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Appendix B — CPU05 and CPU08 512-Byte Table Indexing Code
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*
* File : INDEXX.ASM
* Description :
* The following code illustrates the
* different instructions used to address
* a 512 byte table in memory. HC05 and HC08
* code is compared.
* Notes: Comments to the right of some instructions
* give numbers.
* CPU05 - 1st # is CPU05 cycle count
* 2nd # is instruction byte count
* CPU08 - 1st # is CPU08 cycle count
* 2nd # is instruction byte count
* Please consult the CPU08 Reference Manual
* for further details on these instructions
* Code is written for educational
* purposes only
*
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* For the purpose of this example, the table address
* will be predefined in RAM.
* TBL_A = $120
TBL_ST0 EQU $400 ; start of table, section 0
TBL_ST1 EQU TBL_ST0+256T ; start of table, section 1
ORG $50 ; start of RAM variables
TBL_A RMB 2 ; address for table to be
; accessed by the code
ORG $200
***** Address a 512 byte table with the index register
***** The table starts at $400 and ends at $5FF
F
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