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參數(shù)資料
| 型號： | AN1746 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Migrating from the MC68HC705K1 to the MC68HC705KJ1 |
| 中文描述： | 從MC68HC705K1遷移到MC68HC705KJ1 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 308K |
| 代理商： | AN1746 |
Application Note
AN1746
For applications that demand more performance, the KJ1 maximum
internal clock frequency is 4 MHz. The K1 maximum internal clock
frequency is 2 MHz.
Reset and LVR
Circuitry
The reset function on the KJ1 has additional features:
TheRESETpincontainsasteeringdiodetodischargeanyvoltage
on the pin to V
DD
when the power is removed.
The RESET pin contains an internal pullup resistor to V
DD
to allow
the RESET pin to be left unconnected for low-power applications.
The KJ1 has all of the K1 reset sources except a low-voltage reset
(LVR). These are:
–
Power-on reset
–
Logic 0 on the RESET pin
–
Computer operating properly (COP)
–
Illegal address
The KJ1 does not have an internal LVR. If your K1 design used the LVR,
external LVR circuitry must be added to replace this function.
Interrupts
Like the K1, the KJ1 has the same interrupt sources and functionality.
These are:
Software interrupt
Logic 0 applied to the IRQ/V
PP
pin
Logic 1 applied to one of the PA3–PA0 pins
A timer overflow interrupt
A real-time interrupt
The port A interrupt option on the K1 is programmed by writing to the
PIRQ bit (bit 2) of the MOR at location $17. On the KJ1, write to the PIRQ
bit (bit 2) of the MOR at location $7F1.
The external interrupt sensitivity on the K1 is programmed by writing to
the LEVEL bit (bit 1) of the MOR at location $17. On the KJ1, write to the
LEVEL bit (bit 1) of the MOR at location $7F1.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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