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參數(shù)資料
| 型號： | AN221D04-DEVLP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Dynamically Reconfigurable FPAA With Enhanced I/O |
| 中文描述： | 動態(tài)可重構FPAA的具有增強的I / O |
| 文件頁數(shù)： | 12/21頁 |
| 文件大?。?/td> | 448K |
| 代理商： | AN221D04-DEVLP |
AN221E04 Datasheet – Dynamically Reconfigurable FPAA With Enhanced I/O
DS030100-U006a - 12 -
CAB (Configurable Analog Block) Differential Operational Amplifier
Parameter
Symbol
High Precision Input/Output
Range
Standard Precision Input/Output
Range
High Precision.
Differential Input/Output
c
Standard Precision
Differential Input/Output
d
Common Mode Input Voltage
Range
Common Mode Output Voltage
Range
Min
Typ
Max
Unit
Comment
VMR +/- 1.5v
Vinouta
0.5
-
3.5
V
Vinouta
0.1
-
3.9
V
VMR +/-1.9v
Vdiffioa
-
-
+/-3.0
V
Common mode voltage = 2 V
Vdiffioa
-
-
+/-3.8
V
Common mode voltage = 2 V
Vcm
0
2.0
4
V
Vcm
1.9
2.0
2.1
V
Equivalent Input Voltage Offset.
Voffset
0.1
5
15
mV
Some CAMs (Configurable
Analog Modules) can inherently
compensate
from -40°C to 125°C some
CAMs (Configurable Analog
Modules) can inherently
compensate
Variation between CAMs is
expected because of variations
in architecture
Example 1
GainInv CAM
CAM clock = 1MHz
CAM parameter settings
Gain = 1
Example 2
Filterbiquad
Setting = Low pass filter
CAM clock = 1MHz
CAM parameter settings
Gain = 1,
Corner frequency = 50KHz
Quality Factor = 0.707
Applicable when the OpAmp
load is internal to the FPAA
Applicable when the OpAmp
driving signal out of the FPAA
package
Applicable when sourcing and
loading the OpAmp with a load
internal to the FPAA
The OpAmp output is designed
to drive all internal nodes, these
are dominantly capacitive loads
Output to an FPAA output pin
(ouput cell bypass mode). This
variable is influenced by CAB
capacitor size, CAB clock
frequency and CAB architecture
Additional loading causes
internal voltage drops across
output stage and series
resistances
The output stage has a small
signal output impedance of
approx 10ohm
Example1
GainInv CAM
CAM clock = 1MHz
Gain = 1
Offset Voltage Temperature
Coefficient
Voffsettc
-
1
10
μV/°C
Power Supply Rejection Ratio
PSSR
-
80
-
dB
Common Mode Rejection Ratio
CMRR
-
77
-
dB
Common Mode Rejection Ratio
CMRR
-
60
-
dB
Differential Slew Rate, Internal
Slew
-
50
-
V/μsec
Differential Slew Rate, External
Slew
-
10
-
V/μsec
Unity Gain Bandwidth,
Full Power Mode.
UGB
-
50
-
MHz
Input Impedance, Internal
Rin
10
-
-
Mohm
Output Impedance, Internal
Rout
-
-
-
Ohms
Output Impedance, External
Rout
-
-
-
Ohms
Output Load, External
c e
Output Load, External
c e
Output Load, External
d e f
Rload
Cload
0.1
-
-
-
-
Mohm
pF
50
Rload
1
10
-
Kohm
Output Load, External
d e f
Noise Figure
g
Cload
-
-
50
pF
Noise
-
0.13
-
μV/sqrtHz
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