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參數(shù)資料
| 型號(hào)： | AN231E04-E2-QFNSP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Dynamically Reconfigurable dpASP |
| 中文描述： | 動(dòng)態(tài)可重構(gòu)dpASP |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 445K |
| 代理商： | AN231E04-E2-QFNSP |
AN231E04 Datasheet – Dynamically Reconfigurable dpASP
DS231000-U001d
- 10 -
1.5
Analog I/O Characteristics (VDD = 3.3v +/-10%, -40 to 85 deg.C unless commented)
1.5.1
Analog Inputs General
Parameter
Input Range
Symbol
Min
VMR -
1.375
0
Typ
Max
VMR +
1.375
+/-2.75
Unit
Comment
VMR set to 1.5V
Vina
-
V
Differential Input
Common Mode
Input Range
Input Offset
Vdiffina
-
V
VMR = 1.5 V.
Limited by signal clipping for large
waveforms. Please see figures
IO cell, unity gain mode intrinsic
IO cell, unity gain mode, auto-null
on.
CAB, unity gain mode.
CAB, unity gain mode, auto-null
on.
CAB, unity gain mode, auto-null
and chopping on.
Max value is clock, CAM and
input stage dependent. Input
frequency for most CAMs is
limited to approx <2MHz due to
CAM signal processing which is
based on sampled data
architectures.
Vcm
1.4
1.5
1.6
V
VosIOInt
-
3.0
18
mV
VosIOAZ
-
0.5
1.0
mV
VosCabI
-
3
18
mV
uV
VosCabAz
-
250
1000
VosCabzC
-
75
250
uV
Input Frequency
Fain
0
<2
8
MHz
1.5.2
Parameter
Output voltage range
IO Differential Operational Amplifier
Symbol
Min
VMR -
1.375
Typ
Max
VMR+
1.375
+/-
2.75
Unit
Comment
VMR = 1.5V. Measured for IO
SnH circuit.
Common mode voltage = 1.5 V.
Measured for IO SnH circuit.
Limited due to causing signal
clipping for large waveforms.
VMR can be varied if supplied
externally (+200mV to -1.0volt)
Due to common mode offsets.
Vinouta
-
V
Differential Input/Output
Vdiffioa
-
-
V
Common Mode Input Voltage
Range (Note1)
Vcm
VMR
VMR
VMR
V
Common Mode Output Voltage
Deviation from VMR
Equivalent Input Voltage Offset.
Vcm
-
23.5
72.7
mV
VoffsetI
-
3.0
18.0
mV
Intrinsic offset voltage.
Auto-null offset voltage,
rectangular distribution.
see application note AN231002
“Auto-nulling within the
AN231E04”
Auto-null mode, from -40°C to
125°C.
Sample and Hold mode, 1MHz
clk, at DC
Sample and Hold mode, 1MHz
clk, at DC
Opamp driving off chip with Max
load. Effective internal slew is
affected by the internal routing
and load is normally much faster
10pF external load
Voltage gain mode
Measured at package pins.
Track impedance increases the
Equivalent Input Voltage Offset.
VoffsetAZ
-
500
1000
uV
Auto-null time, from LCCb falling
edge.
T
AZ
-
60
-
ms
Offset Voltage Temperature
Coefficient
VoffsettAZ
TC
-
4
-
μV/°C
Power Supply Rejection Ratio
PSSR
60
-
-
dB
Common Mode Rejection Ratio
CMRR
60
-
-
dB
Differential Slew Rate
Slew
-
50
-
V/μsec
Unity Gain Bandwidth.
Open loop gain
Input Impedance
UGB
Av
Rin
-
-
63
103
-
-
-
-
MHz
dB
Mohm
10
Output Impedance
Rout
-
33
-
Ohms
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