參數(shù)資料
型號(hào): AN8015SH
廠商: PANASONIC CORP
元件分類: 穩(wěn)壓器
英文描述: Single-channel step-down, step-up, or inverting use DC-DC converter control IC
中文描述: 0.1 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO10
封裝: SSOP-10
文件頁(yè)數(shù): 11/14頁(yè)
文件大?。?/td> 131K
代理商: AN8015SH
11
Voltage Regulators
AN8015SH
I
Application Notes (continued)
[4] Triangular wave oscillation circuit (continued)
2. Usage notes
This IC uses the constant current given by the timing resistor R
T
as the bias current of the triangular oscillation
block and the PWM comparator for consumption current reduction. The total consumption current is approximately
1.8 mA (typical) when R
T
is 15 k
, and it increases to approximately 2.5 mA (typical) when R
T
is 5.6 k
. In order
to obtain the steady-state output current of 100 mA at the open collector output, it is necessary to set R
T
value to
15 k
or smaller.
It is possible to use the circuit in the recom-
mended operating range of 2 kHz to 500 kHz of the
oscillation frequency. However, the timing resistor
R
T
versus the oscillation frequency should be set
within the recommended range shown in figure 5.
Also, refer to the "Applications Notes, [1] Main
characteristics, Timing capacitance
Oscillation
frequency" for setting the timing capacitance.
For a high frequency use, the overshoot and un-
dershoot amounts increase due to operation delay
of the triangular oscillation comparator, and the
maximum duty ratio drops. This effect can be alle-
viated by speeding up through the reduction of the
resistor R
T
and increase in the circuit current.
Note that this IC can not be used as an IC for
slave when the several ICs are operated in parallel
synchronous mode.
[5] Time constant setting method for short-circuit protection circuit with joint-use of soft start/timer latch type
The constructional block diagram of protection latch circuit is shown in figure 6. The comparator for short-circuit
protection compares the output of error amplifier V
FB
with the reference voltage of 1.85 V at all the time.
When the load conditions of DC-DC converter output is stabilized, there is no fluctuation of error amplifier
output and the short-circuit protection comparator also keeps the balance. At this moment, the output transistor Q1 is
in the conductive state and the S.C.P. terminal is hold to approximately 1.25 V through the clamp circuit.
When the load conditions suddenly change, and high-level signal (1.85 V or higher) is input from the error amplifier
to the noninverted input of the short-circuit protection comparator, the short-circuit protection comparator outputs the
low-level signal. Since this signal cuts off the output transistor Q1, the S.C.P. terminal voltage V
PE
is released, and the
externally connected capacitor C
S
starts charging according to the following equation:
t
PE
[V]
C
S
t
PE
C
S
t
PE
[F]
0.58
V
PE
=
V
STBY
+
I
CHG
×
1.83 V
=
1.25 V
+
I
CHG
×
C
S
=
I
CHG
×
I
CHG
is the constant current determined by the oscillation timing resistor R
T
and its dispersion and fluctuation with
temperature are small. I
CHO
is expressed in the following equation:
I
CHG
=
V
RT
×
1
30
[A]
R
T
V
RT
is approximately 0.5 V and I
CHO
becomes approximately 1.1
μ
A when R
T
=
15 k
.
O
O
1 k
1 M
100 k
500 k
10 k
15 k
5 k 5.6 k
Timing resistance
R
T
(
)
10 k
Figure 5. Timing resistance recommended condition
Recommended operating
condition
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