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參數(shù)資料
| 型號(hào)： | AND8001D |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | ODD NUMBER DIVIDE BY COUNTERS WITH 50% OUTPUTS AND SYNCHRONOUS CLOCKS |
| 中文描述： | 奇數(shù)除以計(jì)數(shù)器與50％的產(chǎn)出和同步時(shí)鐘 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大?。?/td> | 67K |
| 代理商： | AND8001D |
AND8001/D
http://onsemi.com
6
Figure 6.
Q
Q
D
C
Q
Q
D
C
Q
Q
D
C
Divide By 3
50% Out
Clk in
A
B
C
Q
Q
J
C
E
K
Divide By 6
50% Out
D
CLK
AQ
BQ
CQ
DQ
OUT, EQ
Notice FF ”A” was chosen as the FF to drive FF ”E” in
order to align the positive edges of the clock, Divide By 3,
and divide by 6. The overall skew of the output could be
better matched if all the same type of FF and gates are used.
We already know the Divide By 3 is lockup immune,
following flow chart Figure 7 shows that the addition of the
J K does not change that situation for the Divide By 6.
Figure 7. Divide by 6 Flow Chart
011
101
100
010
000
001
111
110
The flow shows no lockup, but if one observes that the J
K is a sort of toggle device it is obvious that it can’t lock up
the counter.
The J K may need bigger input AND gates to accomplish
larger divide numbers. As an example, pick a Divide By 12
and use J K type FF’s to do the function.
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