參數(shù)資料
型號(hào)： AP1705CW5
廠商： INTEGRATED CIRCUIT TECHNOLOGY CORP
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5
封裝： LEAD FREE, SOT-23, 5 PIN
文件頁(yè)數(shù)： 8/13頁(yè)
文件大?。?/td> 288K
代理商： AP1705CW5
AP1705/6/7
Processor Supervisory Circuits
Anachip Corp.
www.anachip.com.tw
Rev. 1.0 Nov. 17, 2005
4/13
Electrical Characteristics
(Over recommended operating free-air temperature range, unless otherwise noted)
Sym.
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
AP1705/6/7-25
2.21
2.25
2.30
AP1705/6/7-30
2.59
2.63
2.69
AP1705/6/7-33
2.88
2.93
3.00
AP1705/6/7-35
3.00
3.08
3.15
AP1705/6/7-43
3.93
4.00
4.08
AP1705/6/7-45
4.31
4.38
4.46
AP1705/6/7-50
TA = 0
oC-85oC
4.56
4.63
4.71
V
AP1705/6/7-25
2.20
2.25
2.30
AP1705/6/7-30
2.57
2.63
2.69
AP1705/6/7-33
2.86
2.93
3.00
AP1705/6/7-35
3.00
3.08
3.15
AP1705/6/7-43
3.92
4.00
4.08
AP1705/6/7-45
4.30
4.38
4.46
VIT-
Negative-going
Input Threshold
Voltage
(see Note 3)
AP1705/6/7-50
TA = -40
oC-85oC
4.55
4.63
4.71
V
AP1705/6/7-25
AP1705/6/7-30
AP1705/6/7-33
AP1705/6/7-35
-
50
-
AP1705/6/7-43
AP1705/6/7-45
Vhys
Hysteresis at VCC
Input
AP1705/6/7-50
-
50
-
mV
IIH(AV)
Average
High-level Input
Current
WDI=VCC,
Time average
(dc=88%)
-
120
-
A
IIL(AV)
Average
Low-level Input
Current
WDI
WDI=0.3V, VCC=5.5V
time average (dc=12%)
-
-15
-
A
WDI
WDI=VCC
-
140
190
IIH
High-level Input
Current
MR
MR =VCC× 0.7,
VCC=5.5V
-
-40
-60
A
WDI
WDI=0.3V, VCC=5.5V
-
140
190
IIL
Low-level Input
Current
MR
MR =0.3V, VCC=5.5V
-
-110
-160
A
AP1705/6/7-25
AP1705/6/7-30
AP1705/6/7-33
-
-500
IOS
Output
Short-circuit
Current
(see note 4)
RESET
AP1705/6/7-50
VCC=VIT, mas+0.2V,
VO=0V
-
-500
A
ICC
Supply Current
WDI and
MR
Unconnected, Outputs
unconnected
VCC = VIT-+1.0V
-
25
35
A
Internal Pull-up Resistor at
MR
-
60
-
k
TC
VOUT Temperature Coefficient
50
-
ppm/oC
Ci
Input Capacitance at
MR , WDI
VI=0V to 5.5V
-
5
-
pF
Note 3:
To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1F) should be placed near the supply
terminals.
Note 4:
The RESET short-circuit current is the maximum pull-up current when RESET is driven low by a P bidirectional reset pin.
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