ProASICPLUS Flash Family FPGAs v5.9 2-5 Array Coordinates During many place-and-" />
參數(shù)資料
型號： APA600-PQG208
廠商： Microsemi SoC
文件頁數(shù)： 57/178頁
文件大?。?/td> 0K
描述： IC FPGA PROASIC+ 600K 208-PQFP
標準包裝： 24
系列： ProASICPLUS
RAM 位總計： 129024
輸入/輸出數(shù)： 158
門數(shù)： 600000
電源電壓： 2.3 V ~ 2.7 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 208-BFQFP
供應商設備封裝： 208-PQFP（28x28）
ProASICPLUS Flash Family FPGAs
v5.9
2-5
Array Coordinates
During many place-and-route operations in Actel’s
Designer software tool, it is possible to set constraints
that require array coordinates.
Table 2-2 is provided as a reference. The array coordinates
are measured from the lower left (0,0). They can be used in
region constraints for specific groups of core cells, I/Os, and
RAM blocks. Wild cards are also allowed.
I/O and cell coordinates are used for placement
constraints. Two coordinate systems are needed because
there is not a one-to-one correspondence between I/O
cells and core cells. In addition, the I/O coordinate system
changes depending on the die/package combination.
Core cell coordinates start at the lower left corner
(represented as (1,1)) or at (1,5) if memory blocks are
present at the bottom. Memory coordinates use the
same system and are indicated in Table 2-2. The memory
coordinates for an APA1000 are illustrated in Figure 2-5.
For more information on how to use constraints, see the
Designer User’s Guide or online help for ProASICPLUS
software tools.
Table 2-2
Array Coordinates
Device
Logic Tile
Memory Rows
All
Min.
Max.
Bottom
Top
xy
x
y
Min.
Max.
APA075
1
96
32
–
(33,33) or (33, 35)
0,0
97, 37
APA150
1
128
48
–
(49,49) or (49, 51)
0,0
129, 53
APA300
1
5
128
68
(1,1) or (1,3)
(69,69) or (69, 71)
0,0
129, 73
APA450
1
5
192
68
(1,1) or (1,3)
(69,69) or (69, 71)
0,0
193, 73
APA600
1
5
224
100
(1,1) or (1,3)
(101,101) or (101, 103)
0,0
225, 105
APA750
1
5
256
132
(1,1) or (1,3)
(133,133) or (133, 135)
0,0
257, 137
APA1000
1
5
352
164
(1,1) or (1,3)
(165,165) or (165, 167)
0,0
353, 169
Figure 2-5 Core Cell Coordinates for the APA1000
(353,169)
(352,167)
(352,165)
(352,164)
(352,5)
(352,3)
(353,0)
(352,1)
(1,5)
(1,1)
(1,164)
(1,165)
(1,3)
(1,167)
(1,169)
(0,0)
Core
Memory
Blocks
Memory
Blocks
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相關代理商/技術參數(shù)
參數(shù)描述
APA600-PQG208A 功能描述:IC FPGA PROASIC+ 600K 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASICPLUS 產(chǎn)品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA（23x23）
APA600-PQG208I 功能描述:IC FPGA PROASIC+ 600K 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASICPLUS 產(chǎn)品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA（23x23）
APA600-PQG208M 制造商:Microsemi Corporation 功能描述:FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um Technology 2.5V 208-Pin PQFP 制造商:Microsemi Corporation 功能描述:FPGA PROASICPLUS 600K GATES 180MHZ 0.22UM 2.5V 208PQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 158 I/O 208PQFP 制造商:Microsemi Corporation 功能描述:IC FPGA PROASIC+ 600K 208PQFP
APA600-PQGB 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA600-PQGES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
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