鍨嬭櫉(h脿o)锛� | APA750-FG896 |
寤犲晢锛� | Microsemi SoC |
鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 15/178闋�(y猫) |
鏂囦欢澶у皬锛� | 0K |
鎻忚堪锛� | IC FPGA PROASIC+ 750K 896-FBGA |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 27 |
绯诲垪锛� | ProASICPLUS |
RAM 浣嶇附瑷�(j矛)锛� | 147456 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 562 |
闁€鏁�(sh霉)锛� | 750000 |
闆绘簮闆诲锛� | 2.3 V ~ 2.7 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | 0°C ~ 70°C |
灏佽/澶栨锛� | 896-BGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 896-FBGA锛�31x31锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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APA750-FGG896 | IC FPGA PROASIC+ 750K 896-FBGA |
HSC49DRYN-S93 | CONN EDGECARD 98POS DIP .100 SLD |
A3PE3000L-FGG484I | IC FPGA 1KB FLASH 3M 484-FBGA |
170-015-172L000 | CONN DB15 CRIMP MALE TIN |
HSC49DRYH-S93 | CONN EDGECARD 98POS DIP .100 SLD |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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APA750-FG896A | 鍔熻兘鎻忚堪:IC FPGA PROASIC+ 750K 896-FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:ProASICPLUS 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:352-CQFP锛�75x75锛� |
APA750-FG896I | 鍔熻兘鎻忚堪:IC FPGA PROASIC+ 750K 896-FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:ProASICPLUS 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:352-CQFP锛�75x75锛� |
APA750-FGB | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ProASIC Flash Family FPGAs |
APA750-FGES | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ProASIC Flash Family FPGAs |
APA750-FGG676 | 鍔熻兘鎻忚堪:IC FPGA PROASIC+ 750K 676-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:ProASICPLUS 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:352-CQFP锛�75x75锛� |