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參數(shù)資料
| 型號(hào)： | AS5C4009 |
| 英文描述： | 4096Kbits 512K x 8 Replacement with DSCC 5962-n/a | SRAM |
| 中文描述： | 4096Kbits為512k × 8置換籍局5962氮/ 1 |靜態(tài)存儲(chǔ)器 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 136K |
| 代理商： | AS5C4009 |
S R A M
AS5C4009
Austin Semiconductor, Inc.
AS5C4009
Rev. 5.0 6/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
WRITE CYCLE NO. 1
(WE Controlled)
WRITE CYCLE NO. 2
(Write Enabled Controlled)
NOTES:
1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels.
2. At any given temperature adn voltage condition, tHZ (MAX) is less than tLZ (MIN) both for a given device and from device to
device interconnection.
3. A write occurs during the overlap of a low CE\ adn a low WE\. A write begins at the latest transistion among CE\ going Low and
WE\ going Low: A write end at the earliest transistion among CE\ going High and WE\ going High, tWP is measured from the
beginning of write to the end of write.
4. tCW is measured from the CE\ going Low to end of write.
5. tAS is measured from the address valid to the beginning of write.
6. tWR is measure from the end of write to the address change. tWR applied in case a write ends are CE\ or WE\ going High.
ADDRESS
t
WC
t
CW(4)
CE\
123456789012345678123456789
123456789012345678123456789
123456789012345678123456789
123456789012345678123456789
123456789012345678123456789
1234567890123456789012
1234567890123456789012
1234567890123456789012
1234567890123456789012
1231234567890123456
1231234567890123456
1231234567890123456
1231234567890123456
12345678901234567
12345678901234567
12345678901234567
12345678901234567
t
AW
Data Valid
t
WR(6)
t
AS(5)
DATA OUT
1234567
1234567
1234567
Data Undefined
t
WP(3)
t
DW
t
DH
t
WHZ
t
OW
WE\
DATA IN
1234567890123456789012123456789
1234567890123456789012123456789
1234567890123456789012123456789
1234567890123456789012123456789
12345678901234567890123456
12345678901234567890123456
12345678901234567890123456
12345678901234567890123456
1234123456789012345678
1234123456789012345678
1234123456789012345678
1234123456789012345678
ADDRESS
t
WC
t
CW(4)
CE\
t
AW
Data Valid
t
WR(6)
t
AS(5)
DATA OUT
t
WP(3)
t
DW
t
DH
WE\
DATA IN
High-Z
High-Z
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS5C4009LL | 512K x 8 SRAM |
| AS5C4008 | 4096Kbits 512K x 8 Replacement with DSCC 5962-95600 | SRAM |
| AS5C4008DJECJ-12 | x8 SRAM |
| AS5C4008DJECJ-15 | x8 SRAM |
| AS5C4008DJECJ-17 | x8 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS5C4009CW-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM |
| AS5C4009CW-100/H | 制造商:AUSTIN 制造商全稱:Austin Semiconductor 功能描述:512K x 8 SRAM Ultra Low Power SRAM |
| AS5C4009CW-100H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM |
| AS5C4009CW-100L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM |
| AS5C4009CW-100L/883C | 制造商:Micross Components, Inc. 功能描述:SRAM, 4MB - Rail/Tube |
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