參數(shù)資料
型號(hào): AS6VA2516-BC
英文描述: x16 SRAM
中文描述: x16的SRAM
文件頁(yè)數(shù): 2/9頁(yè)
文件大小: 184K
代理商: AS6VA2516-BC
2
ALLIANCE SEMICONDUCTOR
8/31/00
AS6VA25616
Functional description
The AS6VA25616 is a low-power CMOS
4,194,304
-bit Static Random Access Memory (SRAM) device organized as 262,144 words × 16
bits. It is designed for memory applications where slow data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
AA
, t
RC
, t
WC
) of 55 ns are ideal for low-power applications. Active high and low chip selects (
CS
)
permit easy memory expansion with multiple-bank memory systems.
When
CS
is high, or UB and LB are high, the device enters standby mode: the AS6VA25616 is guaranteed not to exceed 66
μ
W power
consumption at 3.3V and 55ns. The device also returns data when V
CC
is reduced to 1.5V for even lower power consumption.
A write cycle is accomplished by asserting write enable (
WE
) and chip select (CS) low, and UB and/or LB low. Data on the input pins
I/O1–O16 is written on the rising edge of
WE
(write cycle 1) or
CS
(write cycle 2). To avoid bus contention, external devices should drive
I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (
OE
), chip select (
CS
), UB and LB low, with write enable (
WE
) high. The chip drives
I/O pins with the data word referenced by the input address. When either chip select or output enable is inactive, or write enable is active,
or (UB) and (LB), output drivers stay in high-impedance mode.
These devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and
read.
LB
controls the lower bits, I/O1–I/O8, and
UB
controls the higher bits, I/O9–I/O16.
All chip inputs and outputs are CMOS-compatible, and operation is from either a single 2.7V to 3.3V suppy. Device is available in the JEDEC
standard 400-mL, TSOP II, and 48-ball FBGA packages.
Absolute maximum ratings
Note: Stresses greater than those listed under
AbsouteMaximumRatings
may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specificati on is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Truth table
Key: X = Don’t care, L = Low, H = High.
Parameter
Device
Symbol
V
tIN
V
tI/O
P
D
T
stg
T
bias
I
OUT
Min
–0.5
–0.5
–65
–55
Max
Unit
V
V
W
o
C
o
C
mA
Voltage on V
CC
relative to V
SS
Voltage on any I/O pin relative to GND
Power dissipation
Storage temperature (plastic)
Temperature with V
CC
applied
DC output current (low)
V
CC
+ 0.5
1.0
+150
+125
20
CS
H
L
L
WE
X
X
H
OE
X
X
H
LB
X
H
X
L
H
L
L
H
L
UB
X
H
X
H
L
L
H
L
L
Supply
Current
I/O1–I/O8 I/O9–I/O16
Mode
I
SB
High Z
High Z
Standby (I
SB
)
I
CC
High Z
D
OUT
High Z
D
OUT
D
IN
High Z
D
IN
High Z
High Z
D
OUT
D
OUT
High Z
D
IN
D
IN
Output disable (I
CC
)
L
H
L
I
CC
Read (I
CC
)
L
L
X
I
CC
Write (I
CC
)
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