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參數(shù)資料
| 型號： | AS6WA25616-TI |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 3.0V to 3.6V 256K?6 IntelliwattTM low-power CMOS SRAM with one chip enable |
| 中文描述： | 3.0V至3.6V 256K？6 IntelliwattTM同一個芯片中低功耗CMOS SRAM的啟用 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 215K |
| 代理商： | AS6WA25616-TI |
September 2001
Copyright Alliance Semiconductor. All rights reserved.
AS6WA25616
3.0V to 3.6V 256K×16 Intelliwatt low-power CMOS SRAM with one chip enable
7/9/02; v.1.3
Alliance Semiconductor
P. 1 of 9
Features
AS6WA25616
Intelliwatt active power circuitry
Industrial and commercial temperature ranges available
Organization: 262,144 words × 16 bits
3.0V to 3.6V at 55 ns
Low power consumption: ACTIVE
- 144 mW at 3.6V and 55 ns
Low power consumption: STANDBY
- 72 μW max at 3.6V
Logic block diagram
1.5V data retention
Equal access and cycle times
Easy memory expansion with CS, OE inputs
Smallest footprint packages
- 48-ball FBGA
- 400-mil 44-pin TSOP 2
ESD protection
≥
2000 volts
Latch-up current
≥
200 mA
256K × 16
Array
(4,194,304)
OE
LB
CS
WE
Column decoder
R
A0
A1
A2
A3
A4
A6
A7
A8
A12
A13
V
CC
V
SS
A
A
A
A
A
A
A
A
Control circuit
I/O1–I/O8
I/O9–I/O16
UB
I/O
buffer
Pin arrangement (top view)
48-CSP Ball-Grid-Array Package
2
3
LB
OE
A0
I/O9
UB
I/O10 I/O11
V
SS
I/O12 A17
V
CC
I/O13
I/O15 I/O14 A14
I/O16
NC
A12
NC
A8
1
4
5
6
A
B
C
D
E
F
G
H
A1
A4
A6
A7
A16
A15
A13
A10
A2
CS
I/O2
I/O4
I/O5
I/O6
WE
A11
NC
I/O1
I/O3
V
CC
V
SS
I/O7
I/O8
NC
A3
A5
NC
A9
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
I/O13
V
SS
V
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
A12
CS
I/O1
I/O2
I/O3
I/O4
V
CC
V
SS
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
44-pin 400-mil TSOP 2
1
A4
LB
I/O16
I/O14
2
3
4
A3
A2
A0
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
42
40
43
A7
UB
A6
Selection guide
Product
AS6WA25616
V
CC
Range
Typ
2
(V)
3.3
Speed
(ns)
55
Power Dissipation
Min
(V)
3.0
Max
(V)
3.6
Operating (I
CC
)
Max (mA)
2
Standby (I
SB1
)
Max (
μ
A)
20
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