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參數(shù)資料
| 型號(hào)： | AT17F32-30BJC |
| 廠商： | Atmel |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC EEPROM FLASH 32MBIT 44-PLCC |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 可編程類型： | 閃存 |
| 存儲(chǔ)容量： | 32Mb |
| 電源電壓： | 2.97 V ~ 3.63 V |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
5
3393C–CNFG–6/05
AT17F32
5.4
PAGESEL[1:0](2)
Page select inputs. Used to determine which of the 4 memory pages are targeted during a serial
configuration download. The address space for each of the pages is shown in Table 5-2. When
SER_EN is Low (ISP mode) these pins have no effect.
5.5
RESET/OE(1)
Output Enable (active High) and RESET (active Low) when SER_EN is High. A Low level on
RESET/OE resets both the address and bit counters. A High level (with CE Low) enables the
data output driver.
5.6
CE(1)
Chip Enable input (active Low). A Low level (with OE High) allows CLK to increment the address
counter and enables the data output driver. A High level on CE disables both the address and bit
counters and forces the device into a low-power standby mode. Note that this pin will not
enable/disable the device in the 2-wire Serial Programming mode (SER_EN Low).
5.7
GND
Ground pin. A 0.2 F decoupling capacitor between V
CC and GND is recommended.
5.8
CEO
Chip Enable Output (when SER_EN is High). This output goes Low when the internal address
counter has reached its maximum value. If the PAGE_EN input is set High, the maximum value
is the highest address in the selected partition. The PAGESEL[1:0] inputs are used to make the
4 partition selections. If the PAGE_EN input is set Low, the device is not partitioned and the
address maximum value is the highest address in the device, see Table 5-2 on page 5. In a
daisy chain of AT17F Series devices, the CEO pin of one device must be connected to the CE
input of the next device in the chain. It will stay Low as long as CE is Low and OE is High. It will
then follow CE until OE goes Low; thereafter, CEO will stay High until the entire EEPROM is
read again.
5.9
A2(1)
Device selection input, (when SER_EN Low). The input is used to enable (or chip select) the
device during programming (i.e., when SER_EN is Low). Refer to the AT17F Programming
Specification available on the Atmel web site (www.atmel.com) for additional details.
Notes:
1. This pin has an internal 20 K
pull-up resistor.
2. This pin has an internal 30 K
pull-down resistor.
Table 5-2.
Address Space
Paging Decodes
AT17F32 (32 Mbits)
PAGESEL = 00, PAGE_EN = 1
000000 – 07FFFFh
PAGESEL = 01, PAGE_EN = 1
080000 – 0FFFFFh
PAGESEL = 10, PAGE_EN = 1
100000 – 17FFFFh
PAGESEL = 11, PAGE_EN = 1
180000 – 1FFFFFh
PAGESEL = XX, PAGE_EN = 0
000000 – 1FFFFFh
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參數(shù)描述 |
|---|---|
| AT17F32-30BJI | 功能描述:FPGA-配置存儲(chǔ)器 Serial Flash RoHS:否 制造商:Altera Corporation 存儲(chǔ)類型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17F32-30BJU | 功能描述:FPGA-配置存儲(chǔ)器 SERIAL CONFIG FLASH 32M - 30MHZ RoHS:否 制造商:Altera Corporation 存儲(chǔ)類型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17F32A | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration Flash Memory |
| AT17F32A-30BJI | 功能描述:FPGA-配置存儲(chǔ)器 ASICS RoHS:否 制造商:Altera Corporation 存儲(chǔ)類型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17F32A-30BJU | 功能描述:FPGA-配置存儲(chǔ)器 32M CONFIG FLASH ALTERA 44 RoHS:否 制造商:Altera Corporation 存儲(chǔ)類型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
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