- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19916 > AT17LV256-10JU (Atmel)IC SRL CONFG EEPROM 256K 20-PLCC PDF資料下載
參數(shù)資料
| 型號： | AT17LV256-10JU |
| 廠商： | Atmel |
| 文件頁數(shù)： | 24/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SRL CONFG EEPROM 256K 20-PLCC |
| 標(biāo)準(zhǔn)包裝： | 46 |
| 可編程類型： | 串行 EEPROM |
| 存儲容量： | 256Kb |
| 電源電壓： | 3 V ~ 3.6 V，4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 20-PLCC |
| 包裝： | 管件 |
| 配用： | ATDH2225-ND - CABLE ISP FOR AT17 ATDH2200E-ND - CONFIGURATOR PROGRAM BOARD KIT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁
7
2321I–CNFG–2/08
AT17LV65/128/256/512/010/002/040
4.1
DATA
Three-state DATA output for configuration. Open-collector bi-directional pin for programming.
4.2
CLK
Clock input. Used to increment the internal address and bit counter for reading and
programming.
4.3
WP1
WRITE PROTECT (1). Used to protect portions of memory during programming. Disabled
by default due to internal pull-down resistor. This input pin is not used during FPGA loading
operations. This pin is only available on AT17LV512/010/002 devices.
4.4
RESET/OE
Output Enable (active High) and RESET (active Low) when SER_EN is High. A Low level on
RESET/OE resets both the address and bit counters. A High level (with CE Low) enables the
data output driver. The logic polarity of this input is programmable as either RESET/OE or
RESET/OE. For most applications, RESET should be programmed active Low. This document
describes the pin as RESET/OE.
4.5
WP
Write protect (WP) input (when CE is Low) during programming only (SER_EN Low). When WP
is Low, the entire memory can be written. When WP is enabled (High), the lowest block of the
memory cannot be written. This pin is only available on AT17LV65/128/256 devices.
4.6
WP2
WRITE PROTECT (2). Used to protect portions of memory during programming. Disabled
by default due to internal pull-down resistor. This input pin is not used during FPGA loading
operations. This pin is only available on AT17LV512/010 devices.
4.7
CE
Chip Enable input (active Low). A Low level (with OE High) allows CLK to increment the address
counter and enables the data output driver. A High level on CE disables both the address and bit
counters and forces the device into a low-power standby mode. Note that this pin will not
enable/disable the device in the Two-Wire Serial Programming mode (SER_EN Low).
4.8
GND
Ground pin. A 0.2 F decoupling capacitor between V
CC and GND is recommended.
4.9
CEO
Chip Enable Output (active Low). This output goes Low when the address counter has reached
its maximum value. In a daisy chain of AT17LV series devices, the CEO pin of one device must
be connected to the CE input of the next device in the chain. It will stay Low as long as CE is
Low and OE is High. It will then follow CE until OE goes Low; thereafter, CEO will stay High until
the entire EEPROM is read again. This CEO feature is not available on the AT17LV65 device.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NCV8505D2T50R4G | IC REG LDO 5V .4A D2PAK7 |
| TAJE157M010RNJ | CAP TANT 150UF 10V 20% 2917 |
| GRM1885C1H751JA01D | CAP CER 750PF 50V 5% NP0 0603 |
| AT17LV256-10CU | IC SRL CONFIG EEPROM 256K 8-LAP |
| T97H337K020VSA | CAP TANT 330UF 20V 10% 3226 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT17LV256-10NC | 功能描述:FPGA-配置存儲器 256KB EEPROM 8 PIN LAP 10MHZ RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17LV256-10NI | 功能描述:FPGA-配置存儲器 256 KBIT EEPROM 8 PIN LAP 10MHZ RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17LV256-10NI SL383 | 制造商:Atmel Corporation 功能描述:EEPROM SERL-2WIRE 256KBIT 256K X 1 3.3V/5V 20SOIC - Tape and Reel |
| AT17LV256-10NU | 功能描述:FPGA-配置存儲器 256KB EEPROM 8 PIN LAP 10MHZ RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17LV256-10PC | 功能描述:FPGA-配置存儲器 256 KBIT EEPROM 8 PIN LAP 10MHZ RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。