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參數(shù)資料
| 型號(hào)： | AT17LV256A-10NC |
| 廠商： | Atmel Corp. |
| 元件分類： | FPGA |
| 英文描述： | FPGA Configuration EEPROM Memory |
| 中文描述： | FPGA配置EEPROM存儲(chǔ)器 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 221K |
| 代理商： | AT17LV256A-10NC |
15
AT17LV65/128/256/512/010/002/040
2321E–CNFG–06/03
Figure 1. Ordering Code
Package Type
8CN4
8-lead, 6 mm x 6 mm x 1 mm, Leadless Array Package (LAP) – Pin-compatible with 8-lead SOIC/VOID Packages
8P3
8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1
8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
20J
20-lead, Plastic J-leaded Chip Carrier (PLCC)
20S2
20-lead, 0.300" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
44A
44-lead, Thin (1.0 mm) Plastic Quad Flat Package Carrier (TQFP)
44J
44-lead, Plastic J-leaded Chip Carrier (PLCC)
Voltage
Size (Bits)
Special Pinouts
Package
Temperature
65
= 65K
A
= Altera
8CN4 C = Commercial
128
= 128K
Blank = Xilinx /Atmel/
= 8P3
I = Industrial
256
= 256K
= 8S1
512
= 512K
= 20J
010
= 1M
= 44A
002
= 2M
= 44J
040
= 4M
AT17LV65A-10PC
C
P
N
J
S
TQ
BJ
=
3.0V to 5.5V
Other
= 20S2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT17LV256A-10NI | High-Speed CMOS Logic Dual 4-Input NAND Gates 14-SOIC -55 to 125 |
| AT17LV256A-10PC | FPGA Configuration EEPROM Memory |
| AT17LV256A-10PI | FPGA Configuration EEPROM Memory |
| AT17LV256A-10SC | FPGA Configuration EEPROM Memory |
| AT17LV256A-10SI | High Speed CMOS Logic Dual 4-Input AND Gates 14-PDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT17LV256A-10NI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV256A-10PC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV256A-10PI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV256A-10SC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV256A-10SI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
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