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    參數(shù)資料
    型號: AT17LV65A-10JC
    廠商: Atmel
    文件頁數(shù): 1/18頁
    文件大?。?/td> 0K
    描述: IC SRL CONFIG EEPROM 64K 20-PLCC
    標準包裝: 50
    可編程類型: 串行 EEPROM
    存儲容量: 64kb
    電源電壓: 3 V ~ 3.6 V,4.75 V ~ 5.25 V
    工作溫度: 0°C ~ 70°C
    封裝/外殼: 20-LCC(J 形引線)
    供應商設(shè)備封裝: 20-PLCC
    包裝: 管件
    Features
    EE Programmable 65,536 x 1-, 131,072 x 1-, 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1- and
    2,097,152 x 1-bit Serial Memories Designed to Store Configuration Programs for
    Altera FLEX and APEX FPGAs (Device Selection Guide Included)
    Available as a 3.3V (±10%) and 5.0V (±5% Commercial, ±10% Industrial) Version
    In-System Programmable (ISP) via 2-wire Bus
    Simple Interface to SRAM FPGAs
    Compatible with Atmel AT6000, AT40K and AT94K Devices, Altera FLEX, APEX
    Devices, ORCA FPGAs, Xilinx XC3000, XC4000, XC5200, Spartan, Virtex FPGAs,
    Motorola MPA1000 FPGAs
    Cascadable Read-back to Support Additional Configurations or Higher-density Arrays
    Very Low-power CMOS EEPROM Process
    Programmable Reset Polarity
    Available 8-lead PDIP, 20-lead PLCC and 32-lead TQFP Packages (Pin Compatible
    Across Product Family)
    Emulation of Atmel’s AT24CXXX Serial EEPROMs
    Low-power Standby Mode
    High-reliability
    – Endurance: 100,000 Write Cycles
    – Data Retention: 90 Years for Industrial Parts (at 85
    °C) and 190 Years for
    Commercial Parts (at 70
    °C)
    Green (Pb/Halide-free/RoHS Compliant) Package Options Available
    1.
    Description
    The AT17A series FPGA configuration EEPROMs (Configurators) provide an easy-to-
    use, cost-effective configuration memory for Field Programmable Gate Arrays. The
    AT17A series device is packaged in the 8-lead PDIP
    (1), 20-lead PLCC and 32-lead
    TQFP, see Table 1-1. The AT17A series configurator uses a simple serial-access pro-
    cedure to configure one or more FPGA devices. The user can select the polarity of the
    reset function by programming four EEPROM bytes.These devices also support a
    write-protection mechanism within its programming mode.
    Note:
    1. The 8-lead LAP, PDIP and SOIC packages for the AT17LV65A/128A/256A do not
    have an A label. However, the 8-lead packages are pin compatible with the 8-lead
    package of Altera’s EEPROMs, refer to the AT17LV65/128/256/512/010/002/040
    datasheet available on the Atmel web site for more information.
    The AT17A series configurators can be programmed with industry-standard program-
    mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable.
    Table 1-1.
    AT17A Series Packages
    Package
    AT17LV65A/
    AT17LV128A/
    AT17LV256A
    AT17LV512A
    AT17LV010A
    AT17LV002A
    8-lead
    PDIP
    Yes
    20-lead
    PLCC
    YesYes
    32-lead
    TQFP
    ––
    Yes
    FPGA
    Configuration
    EEPROM
    Memory
    AT17LV65A
    AT17LV128A
    AT17LV256A
    AT17LV512A
    AT17LV010A
    AT17LV002A
    3.3V and 5V
    System Support
    2322G–CNFG–03/06
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