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參數資料
| 型號： | AT17LV65A-10NC |
| 廠商： | Atmel Corp. |
| 英文描述： | High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-SOIC -55 to 125 |
| 中文描述： | FPGA配置EEPROM存儲器 |
| 文件頁數： | 11/24頁 |
| 文件大小： | 221K |
| 代理商： | AT17LV65A-10NC |
19
AT17LV65/128/256/512/010/002/040
2321E–CNFG–06/03
8S1 – SOIC
2325 Orchard Parkway
San Jose, CA 95131
TITLE
DRAWING NO.
R
REV.
Note:
10/10/01
8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
8S1
A
H
1
2
N
3
Top View
C
E
End View
A
B
L
A2
e
D
Side View
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
This drawing is for general information only. Refer to JEDEC Drawing MS-012 for proper dimensions, tolerances, datums, etc.
A
–
1.75
B
–
0.51
C
–
0.25
D
–
5.00
E
–
4.00
e
1.27 BSC
H
–
6.20
L
–
1.27
相關PDF資料 |
PDF描述 |
|---|---|
| AT17LV65A-10NI | High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-SOIC -55 to 125 |
| AT17LV65A-10PC | High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-SOIC -55 to 125 |
| AT17LV65A-10PI | High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-SO -55 to 125 |
| AT17LV65A-10SC | High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-SO -55 to 125 |
| AT17LV65A-10SI | High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-SO -55 to 125 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AT17LV65A-10NI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV65A-10PC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV65A-10PI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV65A-10SC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV65A-10SI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
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