參數(shù)資料
型號: AT32UC3C1512C-AUT
廠商: Atmel
文件頁數(shù): 32/110頁
文件大?。?/td> 0K
描述: IC MCU AVR32 512K FLASH 100TQFP
產(chǎn)品培訓模塊: AVR® UC3 Introduction
標準包裝: 450
系列: AVR®32 UC3 C
核心處理器: AVR
芯體尺寸: 32-位
速度: 66MHz
連通性: CAN,以太網(wǎng),I²C,IrDA,LIN,SPI,UART/USART,USB
外圍設備: 欠壓檢測/復位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 81
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b,D/A 4x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 托盤
配用: ATSTK600-SC03-ND - STK600 TQFP SOCKET CARD AVR
ATSTK600-RC38-ND - STK600 ROUTING CARD AVR
28
32117DS–AVR-01/12
AT32UC3C
Figure 4-2.
The AVR32UC Pipeline
4.3.2
AVR32A Microarchitecture Compliance
AVR32UC implements an AVR32A microarchitecture. The AVR32A microarchitecture is tar-
geted at cost-sensitive, lower-end applications like smaller microcontrollers. This
microarchitecture does not provide dedicated hardware registers for shadowing of register file
registers in interrupt contexts. Additionally, it does not provide hardware registers for the return
address registers and return status registers. Instead, all this information is stored on the system
stack. This saves chip area at the expense of slower interrupt handling.
4.3.2.1
Interrupt Handling
Upon interrupt initiation, registers R8-R12 are automatically pushed to the system stack. These
registers are pushed regardless of the priority level of the pending interrupt. The return address
and status register are also automatically pushed to stack. The interrupt handler can therefore
use R8-R12 freely. Upon interrupt completion, the old R8-R12 registers and status register are
restored, and execution continues at the return address stored popped from stack.
The stack is also used to store the status register and return address for exceptions and scall.
Executing the rete or rets instruction at the completion of an exception or system call will pop
this status register and continue execution at the popped return address.
4.3.2.2
Java Support
AVR32UC does not provide Java hardware acceleration.
4.3.2.3
Floating Point Support
A fused multiply-accumulate Floating Point Unit (FPU), performaing a multiply and accumulate
as a single operation with no intermediate rounding, therby increasing precision is provided. The
floating point hardware conforms to the requirements of the C standard, which is based on the
IEEE 754 floating point standard.
4.3.2.4
Memory Protection
The MPU allows the user to check all memory accesses for privilege violations. If an access is
attempted to an illegal memory address, the access is aborted and an exception is taken. The
MPU in AVR32UC is specified in the AVR32UC Technical Reference manual.
IF
ID
ALU
MUL
Regfile
write
Prefetch unit
Decode unit
ALU unit
Multiply unit
Load-store
unit
LS
Regfile
Read
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