參數(shù)資料
型號: AT32UC3L064-D3UR
廠商: Atmel
文件頁數(shù): 155/174頁
文件大?。?/td> 0K
描述: MCU AVR32 64KB FLASH 48TLLGA
標(biāo)準(zhǔn)包裝: 8,000
系列: AVR®32 UC3 L
核心處理器: AVR
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 9x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-UFLGA
包裝: 帶卷 (TR)
其它名稱: 32UC3L064-D3UR
32UC3L064-D3UR-ND
81
32099I–01/2012
AT32UC3L016/32/64
Figure 8-2.
High Speed Mode
8.4.6
Quick Page Read
A dedicated command, Quick Page Read (QPR), is provided to read all words in an addressed
page. All bits in all words in this page are AND’ed together, returning a 1-bit result. This result is
placed in the Quick Page Read Result (QPRR) bit in Flash Status Register (FSR). The QPR
command is useful to check that a page is in an erased state. The QPR instruction is much
faster than performing the erased-page check using a regular software subroutine.
8.4.7
Quick User Page Read
A dedicated command, Quick User Page Read (QPRUP), is provided to read all words in the
user page. All bits in all words in this page are AND’ed together, returning a 1-bit result. This
result is placed in the Quick Page Read Result (QPRR) bit in Flash Status Register (FSR). The
QPRUP command is useful to check that a page is in an erased state. The QPRUP instruction is
much faster than performing the erased-page check using a regular software subroutine.
8.4.8
Page Buffer Operations
The flash memory has a write and erase granularity of one page; data is written and erased in
chunks of one page. When programming a page, the user must first write the new data into the
Page Buffer. The contents of the entire Page Buffer is copied into the desired page in flash
memory when the user issues the Write Page command, Refer to Section 8.5.1 on page 83.
In order to program data into flash page Y, write the desired data to locations Y0 to Y31 in the
regular flash memory map. Writing to an address A in the flash memory map will not update the
flash memory, but will instead update location A%32 in the page buffer. The PAGEN field in the
Flash Command (FCMD) register will at the same time be updated with the value A/32.
Frequency
Frequency limit
for 0 wait state
operation
No
rm
al
Hi
gh
Speed mode
1 wait state
0 wait state
相關(guān)PDF資料
PDF描述
516-020-000-102 CONN PLUG 20POS RACK & PANEL
AT32UC3L032-D3UR MCU AVR32 32KB FLASH 48TLLGA
516-090-000-302 CONN RACK & PANEL PLUG 90POS
516-038-000-111 CONN PLUG 38POS RACK & PANEL
516-090-000-101 CONN PLUG 90POS RACK & PANEL
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