參數(shù)資料
型號: AT80251G2D-SLRUM
廠商: Atmel
文件頁數(shù): 3/77頁
文件大?。?/td> 0K
描述: IC 8051 MCU ROMLESS 44PLCC
標(biāo)準(zhǔn)包裝: 500
系列: 8x251
核心處理器: C251
芯體尺寸: 8/16-位
速度: 24MHz
連通性: EBI/EMI,I²C,Microwire,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 帶卷 (TR)
11
AT/TSC8x251G2D
4135F–8051–11/06
Address Spaces
The TSC80251G2D derivatives implement four different address spaces:
On-chip ROM program/code memory (not present in ROMless devices)
On-chip RAM data memory
Special Function Registers (SFRs)
Configuration array
Program/Code Memory
The TSC83251G2D and TSC87251G2D implement 32 KB of on-chip program/code
memory. Figure 4 shows the split of the internal and external program/code memory
spaces. If EA# is tied to a high level, the 32-Kbyte on-chip program memory is mapped
in the lower part of segment FF: where the C251 core jumps after reset. The rest of the
program/code memory space is mapped to the external memory. If EA# is tied to a low
level, the internal program/code memory is not used and all the accesses are directed to
the external memory.
The TSC83251G2D products provide the internal program/code memory in a masked
ROM memory while the TSC87251G2D products provide it in an EPROM memory. For
the TSC80251G2D products, there is no internal program/code memory and EA# must
be tied to a low level.
Figure 4.
Program/Code Memory Mapping
Note:
Special care should be taken when the Program Counter (PC) increments:
If the program executes exclusively from on-chip code memory (not from external mem-
ory), beware of executing code from the upper eight bytes of the on-chip ROM
(FF:7FF8h-FF:7FFFh). Because of its pipeline capability, the TSC80251G2D derivative
may attempt to prefetch code from external memory (at an address above FF:7FFFh)
and thereby disrupt I/O Ports 0 and 2. Fetching code constants from these 8 bytes does
not affect Ports 0 and 2.
When PC reaches the end of segment FF:, it loops to the reset address FF:0000h (for
On-chip ROM/EPROM
Code Memory
Program/code
Segments
Program/code
External Memory Space
32 KB
EA# = 0
EA# = 1
32 KB
Reserved
64 KB
128 KB
FF:FFFFh
FF:8000h
FF:7FFFh
FF:0000h
FE:FFFFh
FE:0000h
FD:FFFFh
01:FFFFh
01:0000h
02:0000h
00:FFFFh
00:0000h
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