參數(shù)資料
型號: AT80C31X2-3CSUM
廠商: Atmel
文件頁數(shù): 9/42頁
文件大?。?/td> 0K
描述: IC 8031 MCU ROMLESS 40DIP
標準包裝: 216
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40/20MHz
連通性: UART/USART
外圍設備: POR
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
17
4428E–8051–02/08
AT/TS80C31X2
10. Interrupt System
The TS80C31X2 has a total of 5 interrupt vectors: two external interrupts (INT0 and INT1), two
timer interrupts (timers 0 and 1) and the serial port interrupt. These interrupts are shown in Fig-
Figure 10-1. Interrupt Control System
Each of the interrupt sources can be individually enabled or disabled by setting or clearing a bit
in the Interrupt Enable register (See Table 10-2.Table 10-3.). This register also contains a global
disable bit, which must be cleared to disable all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority levels by
setting or clearing a bit in the Interrupt Priority register (See Table 10-3.) and in the Interrupt Pri-
ority High register (See Table 10-4.). shows the bit values and priority levels associated with
each combination.
Table 10-1.
Priority Level Bit Values
IE1
0
3
High priority
interrupt
Interrupt
polling
sequence, decreasing
from high to low priority
Low priority
interrupt
Global Disable
Individual Enable
TI
RI
TF0
INT0
INT1
TF1
IPH, IP
IE0
0
3
0
3
0
3
0
3
IPH.x
IP.x
Interrupt Level Priority
0
0 (Lowest)
0
1
0
2
1
3 (Highest)
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