參數(shù)資料
型號: AT80C51RD2-SLRUM
廠商: Atmel
文件頁數(shù): 38/81頁
文件大?。?/td> 0K
描述: IC MCU 80C51 HI PERFORM 44PLCC
產(chǎn)品培訓模塊: MCU Product Line Introduction
標準包裝: 1
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 標準包裝
其它名稱: AT80C51RD2-SLRUMDKR
43
4113D–8051–01/09
AT80C51RD2
Table 11-12. PCON Register
PCON - Power Control Register (87h)
Reset Value = 00X1 0000b
Not bit addressable
Power-off flag reset value will be 1 only after a power on (cold reset). A warm reset doesn’t affect
the value of this bit.
765
4321
0
SMOD1
SMOD0
-
POF
GF1
GF0
PD
IDL
Bit
Number
Bit
Mnemonic
Description
7SMOD1
Serial Port Mode bit 1 for UART
Set to select double baud rate in mode 1, 2 or 3.
6SMOD0
Serial Port Mode bit 0 for UART
Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4POF
Power-off Flag
Cleared to recognize next reset type.
Set by hardware when V
CC rises from 0 to its nominal voltage. Can also be set by
software.
3GF1
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
2GF0
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
1PD
Power-down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
0IDL
Idle mode bit
Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.
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