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參數(shù)資料
| 型號： | AT88SA102S-SH-T |
| 廠商： | Atmel |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BATTERY AUTHENTICATION 8SOIC |
| 產(chǎn)品培訓(xùn)模塊： | CryptoAuthentication™ Introduction |
| 標(biāo)準(zhǔn)包裝： | 4,000 |
| 系列： | CryptoAuthentication™ |
| 類型： | 驗(yàn)證芯片 |
| 應(yīng)用： | 網(wǎng)絡(luò)和通信 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
6
2.
IO Protocol
Communications to and from the AT88SA102S take place over a single asynchronously timed wire using a pulse count
scheme. The overall communications structure is a hierarchy:
Table 2-1.
IO Hierarchy
Tokens
Implement a single data bit transmitted on the bus, or the wake-up event.
Flags
Comprised of eight tokens (bits) which convey the direction and meaning of the next group of bits (if any)
which may be transmitted.
Blocks
Of data follow the command and Transmit flags. They incorporate both a byte count and a checksum to
ensure proper data transmission.
Packets
Of bytes form the core of the block without the count and CRC. They are either the input or output parameters
of an Atmel AT88SA102S command or status information from the Atmel AT88SA102S.
See applications notes on the Atmel website for more details on how to use any microprocessor to easily generate the
signaling necessary to send these values to the chip.
2.1
IO Tokens
There are a number of IO tokens that may be transmitted along the bus:
Input: (To AT88SA102S)
Wake
Wake AT88SA102S up from sleep (low power) state
Zero
Send a single bit from system to AT88SA102S with a value of zero
One
Send a single bit from system to AT88SA102S with a value of one
Output: (From AT88SA102S)
ZeroOut
Send a single bit from AT88SA102S to the system with a value of zero
OneOut
Send a single bit from AT88SA102S to the system with a value of one
The waveforms are the same in either direction, however there are some differences in timing based on the expectation that
the host has a very accurate and consistent clock while AT88SA102S has significant part to part variability in its internal clock
generator due to normal manufacturing and environmental fluctuations.
The bit timings are designed to permit a standard UART running at 230.4K baud to transmit and receive the tokens efficiently.
Each byte transmitted or received by the UART corresponds to a single bit received or transmitted by AT88SA102S. See
applications notes on the Atmel website for more details.
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| AT88SA102S-TH-T | 功能描述:序列號注冊 58951-Eb CryptoAuth SHA-256 GRN RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度: 電源電壓-最大: 電源電壓-最小: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| AT88SA102S-TSU-T | 功能描述:序列號注冊 Product Auth. IC CryptoAuth SHA-256 RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度: 電源電壓-最大: 電源電壓-最小: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| AT88SA10HS | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:CryptoAuthentication? Host Security Chip |
| AT88SA10HS_10 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Atmel CryptoAuthentication Host Security Chip |
| AT88SA10HS_11 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Atmel CryptoAuthentication Host Security Chip |
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