
3
AT89C51ID2
4289C–8051–11/05
Block Diagram
Figure 1. Block Diagram
Timer 0
INT
RAM
256x8
T0
T1
RxD
TxD
WR
RD
EA
PSEN
ALE/
XTALA2
XTALA1
EUART
CPU
Timer 1
INT1
Ctrl
INT0
(2)
C51
CORE
(2) (2)
Port 0
P0
Port 1Port 2 Port 3
P1
P2
P3
XRAM
1792 x 8
IB-bus
PCA
RESE
T
PROG
Watch
Dog
PCA
ECI
Vs
s
VC
C
(2)
(1)
(1): Alternate function of Port 1
(2): Alternate function of Port 3
(1)
Timer2
T2EX
T2
(1)
Flash
64Kx8
Keyboard
(1)
Keyboard
SDA
SC
L
MI
SO
MO
S
I
SCK
SS
(3): Alternate function of Port I2
(3) (3)
Port4
P4
(1) (1) (1)(1)
BOOT
2K x8
ROM
Regulator
POR / PFD
Port 5
P5
Parallel I/O Ports &
External Bus
SPI
TWI
E DATA
2K x 8
POR
PFD
XTALB2
XTALB1(1)