參數(shù)資料
型號: AT89C55WD-24AU
廠商: Atmel
文件頁數(shù): 6/34頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 20K 44TQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 160
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: UART/USART
外圍設(shè)備: WDT
輸入/輸出數(shù): 32
程序存儲器容量: 20KB(20K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
PIC10F200/202/204/206
DS41239D-page 12
2007 Microchip Technology Inc.
TABLE 3-2:
PIC10F200/202/204/206 PINOUT DESCRIPTION
Name
Function
Input
Type
Output
Type
Description
GP0/ICSPDAT/CIN+
GP0
TTL
CMOS Bidirectional I/O pin. Can be software programmed for internal
weak pull-up and wake-up from Sleep on pin change.
ICSPDAT
ST
CMOS In-Circuit Serial Programming data pin.
CIN+
AN
Comparator input (PIC10F204/206 only).
GP1/ICSPCLK/CIN-
GP1
TTL
CMOS Bidirectional I/O pin. Can be software programmed for internal
weak pull-up and wake-up from Sleep on pin change.
ICSPCLK
ST
CMOS In-Circuit Serial Programming clock pin.
CIN-
AN
Comparator input (PIC10F204/206 only).
GP2/T0CKI/COUT/
FOSC4
GP2
TTL
CMOS Bidirectional I/O pin.
T0CKI
ST
Clock input to TMR0.
COUT
CMOS Comparator output (PIC10F204/206 only).
FOSC4
CMOS Oscillator/4 output.
GP3/MCLR/VPP
GP3
TTL
Input pin. Can be software programmed for internal weak
pull-up and wake-up from Sleep on pin change.
MCLR
ST
Master Clear (Reset). When configured as MCLR, this pin is
an active-low Reset to the device. Voltage on GP3/MCLR/VPP
must not exceed VDD during normal device operation or the
device will enter Programming mode. Weak pull-up always on
if configured as MCLR.
VPP
HV
Programming voltage input.
VDD
P
Positive supply for logic and I/O pins.
VSS
P
Ground reference for logic and I/O pins.
Legend: I = Input, O = Output, I/O = Input/Output, P = Power, — = Not used, TTL = TTL input,
ST = Schmitt Trigger input, AN = Analog input
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