參數(shù)資料
型號: AT89LP4052-16SU
廠商: Atmel
文件頁數(shù): 17/94頁
文件大小: 0K
描述: IC 8051 MCU FLASH 4K 20SOIC
標(biāo)準(zhǔn)包裝: 38
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 16MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 15
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
24
3547J–MICRO–10/09
AT89LP2052/LP4052
16. Enhanced Timer/Counters
The AT89LP2052/LP4052 has two 16-bit Timer/Counter registers: Timer 0 and Timer 1. As a
Timer, the register is incremented every clock cycle. Thus, the register counts clock cycles.
Since a clock cycle consists of one oscillator period, the count rate is equal to the oscillator
frequency.
As a Counter, the register is incremented in response to a 1-to-0 transition at its corresponding
input pin, T0 or T1. The external input is sampled every clock cycle. When the samples show a
high in one cycle and a low in the next cycle, the count is incremented. The new count value
appears in the register during the cycle following the one in which the transition was detected.
Since 2 clock cycles are required to recognize a 1-to-0 transition, the maximum count rate is 1/2
of the oscillator frequency. There are no restrictions on the duty cycle of the input signal, but it
should be held for at least one full clock cycle to ensure that a given level is sampled at least
once before it changes.
Furthermore, the Timer or Counter functions for Timer 0 and Timer 1 have four operating modes:
variable width timer/counter, 16 bit auto-reload timer/counter, 8 bit auto-reload timer/counter,
and split timer/counter. The control bits C/T in the Special Function Register TMOD select the
Timer or Counter function. The bit pairs (M1, M0) in TMOD select the operating modes.
16.1
Mode 0
Both Timers in Mode 0 are 8-bit Counters with a variable prescaler. The prescaler may vary from
1 to 8 bits depending on the PSC bits in TCONB, giving the timer a range of 9 to 16 bits.
By default the timer is configured as a 13-bit timer compatible to Mode 0 in the standard 8051.
Figure 16-1 shows the Mode 0 operation as it applies to Timer 1 in 13-bit mode. As the count
rolls over from all “1”s to all “0”s, it sets the Timer interrupt flag TF1. The counted input is
enabled to the Timer when TR1 = 1 and either GATE = 0 or INT1 = 1. Setting GATE = 1 allows
the Timer to be controlled by external input INT1, to facilitate pulse width measurements. TR1 is
Table 15-4.
Port Pin Alternate Functions
Port
Pin
Configuration Bits
Alternate
Function
Notes
PxM0.y
PxM1.y
P1.0
P1M0.0
P1M1.0
AIN0
Input-only
P1.1
P1M0.1
P1M1.1
AIN1
Input-only
P1.4
P1M0.4
P1M1.4
SS
P1.5
P1M0.5
P1M1.5
MOSI
P1.6
P1M0.6
P1M1.6
MISO
P1.7
P1M0.7
P1M1.7
SCK
P3.0
P3M0.0
P3M1.0
RXD
P3.1
P3M0.1
P3M1.1
TXD
P3.2
P3M0.2
P3M1.2
INT0
P3.3
P3M0.3
P3M1.3
INT1
P3.4
P3M0.4
P3M1.4
T0
P3.5
P3M0.5
P3M1.5
T1
P3.6
Not configurable
CMPOUT
Pin is tied to comparator output
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