參數(shù)資料
型號: AT89S8252-24PC
廠商: Atmel
文件頁數(shù): 18/41頁
文件大?。?/td> 0K
描述: MCU W/SPI 8KB FLSH 2K EEP 40-DIP
標準包裝: 9
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: SPI,UART/USART
外圍設備: POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
其它名稱: AT89S825224PC
25
AT89S8252
0401G–MICRO–3/06
Serial Downloading
Both the Code and Data memory arrays can be programmed using the serial SPI bus
while RST is pulled to V
CC. The serial interface consists of pins SCK, MOSI (input) and
MISO (output). After RST is set high, the Programming Enable instruction needs to be
executed first before program/erase operations can be executed.
An auto-erase cycle is built into the self-timed programming operation (in the serial
mode ONLY) and there is no need to first execute the Chip Erase instruction unless any
of the lock bits have been programmed. The Chip Erase operation turns the content of
every memory location in both the Code and Data arrays into FFH.
The Code and Data memory arrays have separate address spaces:
0000H to 1FFFH for Code memory and 000H to 7FFH for Data memory.
Either an external system clock is supplied at pin XTAL1 or a crystal needs to be con-
nected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency
should be less than 1/40 of the crystal frequency. With a 24 MHz oscillator clock, the
maximum SCK frequency is 600 kHz.
Serial Programming
Algorithm
To program and verify the AT89S8252 in the serial programming mode, the following
sequence is recommended:
1.
Power-up sequence:
Apply power between VCC and GND pins.
Set RST pin to “H”.
If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to
24 MHz clock to XTAL1 pin and wait for at least 10 milliseconds.
2.
Enable serial programming by sending the Programming Enable serial instruction to
pin MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to
be less than the CPU clock at XTAL1 divided by 40.
3.
The Code or Data array is programmed one byte at a time by supplying the address
and data together with the appropriate Write instruction. The selected memory loca-
tion is first automatically erased before new data is written. The write cycle is self-
timed and typically takes less than 2.5 ms at 5V.
4.
Any memory location can be verified by using the Read instruction which returns the
content at the selected address at serial output MISO/P1.6.
5.
At the end of a programming session, RST can be set low to commence normal
operation.
6.
Power-off sequence (if needed):
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
Turn V
CC power off.
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