參數資料
型號： AT90USB1286-MUR
廠商： Atmel
文件頁數： 67/106頁
文件大?。?/td> 0K
描述： MCU AVR 128K FLASH 16MHZ 64QFN
產品培訓模塊： MCU Product Line Introduction
megaAVR Introduction
標準包裝： 4,000
系列： AVR® 90USB
核心處理器： AVR
芯體尺寸： 8-位
速度： 16MHz
連通性： EBI/EMI，I²C，SPI，UART/USART，USB，USB OTG
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數： 48
程序存儲器容量： 128KB（128K x 8）
程序存儲器類型： 閃存
EEPROM 大小： 4K x 8
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數據轉換器： A/D 8x10b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-VFQFN 裸露焊盤
包裝： 帶卷 (TR)
其它名稱： AT90USB1286-MUR-ND
AT90USB1286-MURTR
63
7593L–AVR–09/12
AT90USB64/128
9.8
Watchdog timer
The Atmel AT90USB64/128 has an enhanced Watchdog Timer (WDT). The main features are:
Clocked from separate on-chip oscillator
Three operating modes
–Interrupt
– System reset
– Interrupt and system reset
Selectable time-out period from 16ms to 8s
Possible hardware fuse watchdog always on (WDTON) for fail-safe mode
Figure 9-7.
Watchdog timer.
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128kHz oscillator.
The WDT gives an interrupt or a system reset when the counter reaches a given time-out value.
In normal operation mode, it is required that the system uses the WDR - Watchdog Timer Reset
- instruction to restart the counter before the time-out value is reached. If the system doesn't
restart the counter, an interrupt or system reset will be issued.
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown
by saving critical parameters before a system reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt
mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security, altera-
tions to the Watchdog set-up must follow timed sequences. The sequence for clearing WDE and
changing time-out configuration is as follows:
128kHz
OSCILLATOR
OSC/2K
OSC/4K
OSC/8K
OSC/16K
OSC/
32K
OSC/64K
OSC/128K
OSC/256K
OSC/512K
OSC/1024K
WDP0
WDP1
WDP2
WDP3
WATCHDOG
RESET
WDE
WDIF
WDIE
MCU RESET
INTERRUPT
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