參數(shù)資料
型號: AT91FR40162SB-CU-999
廠商: Atmel
文件頁數(shù): 18/22頁
文件大?。?/td> 0K
描述: IC MCU 32BIT RISC 121BGA
標準包裝: 1,000
系列: AT91
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 75MHz
連通性: EBI/EMI,UART/USART
外圍設備: WDT
輸入/輸出數(shù): 32
程序存儲器容量: 2MB(1M x 16)
程序存儲器類型: 閃存
RAM 容量: 256K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 121-BGA
包裝: 帶卷 (TR)
5
6410BS–ATARM–12-Jan-10
AT91FR40162SB
4.
Signal Description
Table 4-1.
AT91FR40162SB Signal Description
Module
Name
Function
Type
Active
Level
Comments
EBI
A0 - A23
Address Bus
Output
Valid after reset; do not reprogram A20 to
I/O, as it is MSB of Flash address
D0 - D15
Data Bus
I/O
NCS0 - NCS3
External Chip Select
Output
Low
Used to select external devices
CS4 - CS7
External Chip Select
Output
High
A23 - A20 after reset
NWR0
Lower Byte 0 Write Signal
Output
Low
Used in Byte Write option
NWR1
Upper Byte 1 Write Signal
Output
Low
Used in Byte Write option
NRD
Read Signal
Output
Low
Used in Byte Write option
NWE
Write Enable
Output
Low
Used in Byte Select option
NOE
Output Enable
Output
Low
Used in Byte Select option
NUB
Upper Byte Select
Output
Low
Used in Byte Select option
NLB
Lower Byte Select
Output
Low
Used in Byte Select option
NWAIT
Wait Input
Input
Low
BMS
Boot Mode Select
Input
Sampled during reset; must be driven low
during reset for Flash to be used as boot
memory
AIC
FIQ
Fast Interrupt Request
Input
PIO-controlled after reset
IRQ0 - IRQ2
External Interrupt Request
Input
PIO-controlled after reset
Timer
TCLK0 - TCLK2
Timer External Clock
Input
PIO-controlled after reset
TIOA0 - TIOA2
Multi-purpose Timer I/O Pin A
I/O
PIO-controlled after reset
TIOB0 - TIOB2
Multi-purpose Timer I/O Pin B
I/O
PIO-controlled after reset
USART
SCK0 - SCK1
External Serial Clock
I/O
PIO-controlled after reset
TXD0 - TXD1
Transmit Data Output
Output
PIO-controlled after reset
RXD0 - RXD1
Receive Data Input
Input
PIO-controlled after reset
PIO
P0 - P31
Parallel IO Line
I/O
WD
NWDOVF
Watchdog Overflow
Output
Low
Open drain
Clock
MCKI
Master Clock Input
Input
Schmidt trigger
MCKO
Master Clock Output
Output
Reset
NRST
Hardware Reset Input
Input
Low
Schmidt trigger
NTRI
Tri-state Mode Select
Input
Low
Sampled during reset
ICE
TMS
Test Mode Select
Input
Schmidt trigger, internal pull-up
TDI
Test Data Input
Input
Schmidt trigger, internal pull-up
TDO
Test Data Output
Output
TCK
Test Clock
Input
Schmidt trigger, internal pull-up
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