參數(shù)資料
型號(hào): AT91SAM7X128-AU-999
廠商: Atmel
文件頁數(shù): 13/44頁
文件大小: 0K
描述: IC MCU ARM7 128KB FLASH 100LQFP
產(chǎn)品培訓(xùn)模塊: SAM9 MPU Boot Solutions & Application Deployment
AT91SAM7X and SAM7XC Flash-based Microcontrollers
MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 1,000
系列: SAM7X
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 55MHz
連通性: CAN,以太網(wǎng),I²C,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 62
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 帶卷 (TR)
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7X-EK-ND - KIT EVAL FOR AT91SAM7X256/128
20
6120GS–ATARM–07-Apr-11
SAM7X512/256/128 Summary
Figure 8-3.
Internal Memory Mapping with GPNVM Bit 2 = 1
8.5
Embedded Flash
8.5.1
Flash Overview
The Flash of the SAM7X512 is organized in two banks (dual plane) of 1024 pages of 256
bytes. The 524,288 bytes are organized in 32-bit words.
The Flash of the SAM7X256 is organized in 1024 pages of 256 bytes (single plane). It reads
as 65,536 32-bit words.
The Flash of the SAM7X128 is organized in 512 pages of 256 bytes (single plane). It reads
as 32,768 32-bit words.
The Flash contains a 256-byte write buffer, accessible through a 32-bit interface.
The Flash benefits from the integration of a power reset cell and from the brownout detector.
This prevents code corruption during power supply changes, even in the worst conditions.
When Flash is not used (read or write access), it is automatically placed into standby mode.
8.5.2
Embedded Flash Controller
The Embedded Flash Controller (EFC) manages accesses performed by the masters of the sys-
tem. It enables reading the Flash and writing the write buffer. It also contains a User Interface,
mapped within the Memory Controller on the APB. The User Interface allows:
programming of the access parameters of the Flash (number of wait states, timings, etc.)
starting commands such as full erase, page erase, page program, NVM bit set, NVM bit
clear, etc.
getting the end status of the last command
getting error status
programming interrupts on the end of the last commands or on errors
The Embedded Flash Controller also provides a dual 32-bit Prefetch Buffer that optimizes 16-bit
access to the Flash. This is particularly efficient when the processor is running in Thumb mode.
Two EFCs are embedded in the SAM7X512 to control each bank of 256 KBytes. Dual-plane
organization allows concurrent read and program functionality. Read from one memory plane
256M Bytes
Flash Before Remap
SRAM After Remap
Undefined Areas
(Abort)
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
1 M Bytes
252 M Bytes
Internal FLASH
Internal SRAM
0x0000 0000
0x0010 0000
0x0020 0000
0x0030 0000
Internal ROM
0x003F FFFF
0x0040 0000
1 M Bytes
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