參數(shù)資料
型號: AT91SAM7X256-CU
廠商: Atmel
文件頁數(shù): 11/44頁
文件大?。?/td> 0K
描述: MCU ARM 256K HS FLASH 100-TFBGA
產(chǎn)品培訓模塊: SAM9 MPU Boot Solutions & Application Deployment
AT91SAM7X and SAM7XC Flash-based Microcontrollers
MCU Product Line Introduction
標準包裝: 260
系列: SAM7X
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 55MHz
連通性: CAN,以太網(wǎng),I²C,SPI,SSC,UART/USART,USB
外圍設備: 欠壓檢測/復位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 62
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7X-EK-ND - KIT EVAL FOR AT91SAM7X256/128
19
6120GS–ATARM–07-Apr-11
SAM7X512/256/128 Summary
8.4
Memory Mapping
8.4.1
Internal SRAM
The SAM7X512 embeds a high-speed 128 Kbyte SRAM bank.
The SAM7X256 embeds a high-speed 64 Kbyte SRAM bank.
The SAM7X128 embeds a high-speed 32 Kbyte SRAM bank.
After reset and until the Remap Command is performed, the SRAM is only accessible at address
0x0020 0000. After Remap, the SRAM also becomes available at address 0x0.
8.4.2
Internal ROM
The SAM7X512/256/128 embeds an Internal ROM. At any time, the ROM is mapped at address
0x30 0000. The ROM contains the FFPI and the SAM-BA program.
8.4.3
Internal Flash
The SAM7X512 features two banks (dual plane) of 256 Kbytes of Flash.
The SAM7X256 features one bank (single plane) of 256 Kbytes of Flash.
The SAM7X128 features one bank (single plane) of 128 Kbytes of Flash.
At any time, the Flash is mapped to address 0x0010 0000. It is also accessible at address 0x0
after the reset, if GPNVM bit 2 is set and before the Remap Command.
A general purpose NVM (GPNVM) bit is used to boot either on the ROM (default) or from the
Flash.
This GPNVM bit can be cleared or set respectively through the commands “Clear General-pur-
pose NVM Bit” and “Set General-purpose NVM Bit” of the EFC User Interface.
Setting the GPNVM Bit 2 selects the boot from the Flash. Asserting ERASE clears the GPNVM
Bit 2 and thus selects the boot from the ROM by default.
Figure 8-2.
Internal Memory Mapping with GPNVM Bit 2 = 0 (default)
256M Bytes
ROM Before Remap
SRAM After Remap
Undefined Areas
(Abort)
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
1 M Bytes
252 M Bytes
Internal FLASH
Internal SRAM
0x0000 0000
0x0010 0000
0x0020 0000
0x0030 0000
Internal ROM
0x003F FFFF
0x0040 0000
1 M Bytes
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