參數(shù)資料
型號: AT91SAM7XC128-CU-999
廠商: Atmel
文件頁數(shù): 24/47頁
文件大?。?/td> 0K
描述: IC MCU ARM7 128KB FLASH 100TFBGA
產(chǎn)品培訓(xùn)模塊: SAM9 MPU Boot Solutions & Application Deployment
AT91SAM7X and SAM7XC Flash-based Microcontrollers
MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 3,000
系列: SAM7XC
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 55MHz
連通性: CAN,以太網(wǎng),I²C,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 62
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 帶卷 (TR)
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7XC-EK-ND - KIT EVAL FOR AT91SAM7XC256/128
30
6209DS–ATARM–17-Feb-09
AT91SAM7XC512/256/128
– Higher priority interrupts can be served during service of lower priority interrupt
Vectoring
– Optimizes interrupt service routine branch and execution
– One 32-bit vector register per interrupt source
– Interrupt vector register reads the corresponding current interrupt vector
Protect Mode
– Easy debugging by preventing automatic operations
Fast Forcing
– Permits redirecting any interrupt source on the fast interrupt
General Interrupt Mask
– Provides processor synchronization on events without triggering an interrupt
9.5
Debug Unit
Comprises:
– One two-pin UART
– One Interface for the Debug Communication Channel (DCC) support
– One set of Chip ID Registers
– One Interface providing ICE Access Prevention
Two-pin UART
– USART-compatible User Interface
– Programmable Baud Rate Generator
– Parity, Framing and Overrun Error
– Automatic Echo, Local Loopback and Remote Loopback Channel Modes
Debug Communication Channel Support
– Offers visibility of COMMRX and COMMTX signals from the ARM Processor
Chip ID Registers
– Identification of the device revision, sizes of the embedded memories, set of
peripherals
– Chip ID is 0x271C 0A40 (VERSION 0) for AT91SAM7XC512
– Chip ID is 0x271B 0940 (VERSION 0) for AT91SAM7XC256
– Chip ID is 0x271A 0740 (VERSION 0) for AT91SAM7XC128
9.6
Periodic Interval Timer
20-bit programmable counter plus 12-bit interval counter
9.7
Watchdog Timer
12-bit key-protected Programmable Counter running on prescaled SLCK
Provides reset or interrupt signals to the system
Counter may be stopped while the processor is in debug state or in idle mode
9.8
Real-time Timer
32-bit free-running counter with alarm running on prescaled SLCK
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