參數(shù)資料
型號: AT91SAM9G20B-CFU
廠商: Atmel
文件頁數(shù): 1/42頁
文件大?。?/td> 0K
描述: IC MCU ARM9 247-LFBGA
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 240
系列: SAM9G
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 400MHz
連通性: EBI/EMI,以太網(wǎng),I²C,IrDA,ISI,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: DMA,POR,PWM,WDT
輸入/輸出數(shù): 96
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類型: ROM
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 0.9 V ~ 1.1 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 247-TFBGA
包裝: 托盤
Features
Incorporates the ARM926EJ-S ARM Thumb Processor
– DSP Instruction Extensions, ARM Jazelle Technology for Java Acceleration
– 32-KByte Data Cache, 32-KByte Instruction Cache, Write Buffer
– CPU Frequency 400 MHz
– Memory Management Unit
– EmbeddedICE, Debug Communication Channel Support
Additional Embedded Memories
– One 64-KByte Internal ROM, Single-cycle Access at Maximum Matrix Speed
– Two 16-KByte Internal SRAM, Single-cycle Access at Maximum Matrix Speed
External Bus Interface (EBI)
– Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlash
USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
USB 2.0 Full Speed (12 Mbits per second) Host and Double Port
– Single or Dual On-chip Transceivers
– Integrated FIFOs and Dedicated DMA Channels
Ethernet MAC 10/100 Base T
– Media Independent Interface or Reduced Media Independent Interface
– 128-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
Image Sensor Interface
– ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
– 12-bit Data Interface for Support of High Sensibility Sensors
– SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
Bus Matrix
– Six 32-bit-layer Matrix
– Boot Mode Select Option, Remap Command
Fully-featured System Controller, including
– Reset Controller, Shutdown Controller
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer
Reset Controller (RSTC)
– Based on a Power-on Reset Cell, Reset Source Identification and Reset Output
Control
Clock Generator (CKGR)
– Selectable 32,768 Hz Low-power Oscillator or Internal Low Power RC Oscillator on
Battery Backup Power Supply, Providing a Permanent Slow Clock
– 3 to 20 MHz On-chip Oscillator, One up to 800 MHz PLL and One up to 100 MHz PLL
Power Management Controller (PMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization
Capabilities
– Two Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel, Programmable ICE
Access Prevention
– Mode for General Purpose 2-wire UART Serial Communication
AT91 ARM
Thumb
Microcontrollers
AT91SAM9G20
Summary
6384DS–ATARM–13-Jan-10
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