12
ATF1508ASV(L)
1408H–PLD–7/05
Symbol
Parameter
-15
-20
Units
Min
Max
Min
Max
tPD1
Input or Feedback to Non-registered Output
3
15
20
ns
t
PD2
I/O Input or Feedback to Non-registered Feedback
3
12
16
ns
tSU
Global Clock Setup Time
11
13.5
ns
tH
Global Clock Hold Time
0
ns
t
FSU
Global Clock Setup Time of Fast Input
3
ns
tFH
Global Clock Hold Time of Fast Input
1.0
2.0
MHz
tCOP
Global Clock to Output Delay
9
12
ns
t
CH
Global Clock High Time
5
6
ns
tCL
Global Clock Low Time
5
6
ns
tASU
Array Clock Setup Time
5
7
ns
t
AH
Array Clock Hold Time
4
ns
tACOP
Array Clock Output Delay
15
18.5
ns
tACH
Array Clock High Time
6
8
ns
t
ACL
Array Clock Low Time
6
8
ns
tCNT
Minimum Clock Global Period
13
17
ns
fCNT
Maximum Internal Global Clock Frequency
76.9
66
MHz
t
ACNT
Minimum Array Clock Period
13
17
ns
fACNT
Maximum Internal Array Clock Frequency
76.9
58.8
MHz
f
MAX
Maximum Clock Frequency
100
83.3
MHz
t
IN
Input Pad and Buffer Delay
2
2.5
ns
tIO
I/O Input Pad and Buffer Delay
2
2.5
ns
t
FIN
Fast Input Delay
2
ns
t
SEXP
Foldback Term Delay
8
10
ns
tPEXP
Cascade Logic Delay
1
ns
t
LAD
Logic Array Delay
6
8
ns
t
LAC
Logic Control Delay
3.5
4.5
ns
tIOE
Internal Output Enable Delay
3
ns
tOD1
Output Buffer and Pad Delay
(Slow slew rate = OFF; V
CCIO = 5V; CL = 35 pF)
34
ns
t
OD2
Output Buffer and Pad Delay
(Slow slew rate = OFF; V
CCIO = 3.3V; CL = 35 pF)
34
ns
t
OD3
Output Buffer and Pad Delay
(Slow slew rate = ON; VCCIO = 5V or 3.3V; CL = 35 pF)
56
ns
tZX1
Output Buffer Enable Delay
(Slow slew rate = OFF; VCCIO = 5.0V; CL = 35 pF)
79