參數(shù)資料
型號： ATF1508RE-5AX100
廠商： Atmel
文件頁數(shù)： 4/31頁
文件大?。?/td> 0K
描述： IC CPLD 128MC 3.3V ISP 100TQFP
標準包裝： 90
系列： ATF15xx
可編程類型： 系統(tǒng)內(nèi)可編程（最少 10,000 次編程/擦除循環(huán)）
最大延遲時間 tpd(1)： 7.0ns
電壓電源 - 內(nèi)部： 3 V ~ 3.6 V
宏單元數(shù)： 128
輸入/輸出數(shù)： 80
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 100-TQFP
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
包裝： 托盤
12
3682A–PLD–10/08
ATF1508RE
5.2
On-the-Fly Reconfiguration – OTF
In this mode, the CPLD design pattern stored in the internal configuration memory can be modi-
fied while the previously-programmed design pattern is operating with minimal disturbance to
the programming operation of the new design. The new configuration will take affect after the
OTF programming process is completed and the OTF mode is exited.
The configuration data for any design is stored in the internal configuration memory. Once the
configuration data is transferred to the internal static registers of the CPLD, the CPLD operates
with the design pattern and the configuration memory is free to be re-loaded with a new set of
configuration data. The design pattern due to the new configuration content is activated through
an initialization cycle that occurs on exiting the OTF mode or after the next power up sequence.
Figure 5-2 shows the electrical interface for configuration of the ATF1508RE device in the OTF
mode. The processor is the controlling device that communicates with the CPLD and uses con-
figuration data stored in the external memory to configure the CPLD.
Figure 5-2.
Configuration of ATF1508RE Device Using a Processor and Memory
5.3
Direct Reconfiguration Access – DRA
This reconfiguration mode allows the user to directly modify the internal static registers of the
CPLD without affecting the configuration data stored in the embedded memory. It is more useful
in cases where immediate and temporary context change in the function of the hardware is
desired.
The embedded configuration memory in the ATF1508RE does not change when a new set of
configuration data is passed to the ATF1508RE using the DRA mode. Instead, the internal static
registers of the CPLD are directly written with the data entering the device via the JTAG port. In
other words, it's a temporary change in the function performed by the CPLD since a power
sequence results in the device being configured again by the data stored in the embedded
memory.
5.4
ISP Programming Protection
The ATF1508RE has a special feature that locks the device and prevents the inputs and I/O
from driving if the programming process is interrupted for any reason. The I/O pins default to
high-Z state during such a condition.
All ATF1508RE devices are initially shipped in the erased state, thereby making them ready to
use for ISP.
TCK
ATF1508RE
CPLD Device
Processor
Memory
Address
Data
Serial Data
TDI
TMS
TDO
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