R, tF
參數(shù)資料
型號: ATF16LV8C-15JC
廠商: Atmel
文件頁數(shù): 11/15頁
文件大?。?/td> 0K
描述: IC PLD 15NS 20PLCC
標(biāo)準(zhǔn)包裝: 48
系列: 16V8
可編程類型: EE PLD
宏單元數(shù): 8
輸入電壓: 3 ~ 5.5V
速度: 15ns
安裝類型: 表面貼裝
封裝/外殼: 20-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 20-PLCC
包裝: 管件
其它名稱: ATF16LV8C15JC
ATF16LV8C
5
Input Test Waveforms and
Measurement Levels:
t
R, tF < 1.5ns (10% to 90%)
Output Test Loads:
Commercial
Note:
Similar devices are tested with slightly different loads.
These load differences may affect output signals’ delay
and slew rate. Atmel devices are tested with sufficient
margins to meet compatible devices.
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Power-up Reset
The ATF16LV8C’s registers are designed to reset during
power-up. At a point delayed slightly from V
CC crossing
V
RST, all registers will be reset to the low state. As a result,
the registered output state will always be high on power-up.
This feature is critical for state machine initialization.
However, due to the asynchronous nature of reset and the
uncertainty of how V
CC actually rises in the system, the
following conditions are required:
1.
The V
CC rise must be monotonic from below 0.7V.
2.
The signals from which the clock is derived must
remain stable during T
PR.
3.
After T
PR, all input and feedback setup times must
be met before driving the clock term high.
OUTPUT
PIN
3.3V
CL = 35 pF
R1 = 316
R2 = 348
Pin Capacitance
(f = 1 MHz, T = 25°C)
Typ
Max
Units
Conditions
C
IN
58
pF
V
IN = 0V
COUT
68
pF
VOUT = 0V
Parameter
Description
Typ
Max
Units
T
PR
Power-up
Reset Time
600
1,000
ns
V
RST
Power-up
Reset
Voltage
2.5
3.0
V
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ATF16LV8C-15PI 功能描述:SPLD - 簡單可編程邏輯器件 250 GATE STANDARD POWER 3V - 15NS RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
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