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參數(shù)資料
| 型號： | ATF16V8B-10JC |
| 廠商： | Atmel |
| 文件頁數(shù)： | 2/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLD 8CELL 10NS 20PLCC |
| 標準包裝： | 48 |
| 系列： | 16V8 |
| 可編程類型： | EE PLD |
| 宏單元數(shù)： | 8 |
| 輸入電壓： | 5V |
| 速度： | 10ns |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 20-PLCC |
| 包裝： | 管件 |
10
0364J–PLD–7/05
ATF16V8B/BQ/BQL
11.1
ATF16V8B Registered Mode
PAL Device Emulation/PAL Replacement. The registered mode is used if one or more regis-
ters are required. Each macrocell can be configured as either a registered or combinatorial
output or I/O, or as an input. For a registered output or I/O, the output is enabled by the OE pin,
and the register is clocked by the CLK pin. Eight product terms are allocated to the sum term.
For a combinatorial output or I/O, the output enable is controlled by a product term, and seven
product terms are allocated to the sum term. When the macrocell is configured as an input, the
output enable is permanently disabled.
Any register usage will make the compiler select this mode. The following registered devices
can be emulated using this mode:
16R8
16RP8
16R6
16RP6
16R4
16RP4
Figure 11-1. Registered Configuration for Registered Mode
Notes:
1. Pin 1 controls common CLK for the registered outputs. Pin 11 controls common OE for the reg-
istered outputs. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
Figure 11-2. Combinatorial Configuration for Registered Mode
Notes:
1. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
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PDF描述 |
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| ATF16LV8C-10SC | IC PLD EE 15NS 20-SOIC |
| 1-84952-4 | CONN FPC 14POS 1.00MM R/A SMD |
| AMC65DREF-S734 | CONN EDGECARD 130PS .100 EYELET |
| ABC65DRAI-S734 | CONN EDGECARD 130PS .100 R/A PCB |
| 2-84952-4 | CONN FPC 24POS 1MM RT ANG SMD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATF16V8B-10JC SL383 | 制造商:Atmel Corporation 功能描述:10NS,250 GATES EPLD,20 PIN PLCC,5V GRN - 10NS, PLCC, COM TEM - Tape and Reel |
| ATF16V8B-10JI | 功能描述:EEPLD - 電子擦除可編程邏輯設(shè)備 250 Gate RoHS:否 制造商:Atmel 邏輯系列:ATF16V8BQL 最大工作頻率:62 MHz 可編程輸入/輸出端數(shù)量:20 電源電流:20 mA 延遲時間:15 ns 每個宏指令的積項數(shù):8 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 大電池數(shù)量:8 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 安裝風格:Through Hole 封裝 / 箱體:PDIP-20 |
| ATF16V8B-10JU | 功能描述:EEPLD - 電子擦除可編程邏輯設(shè)備 10 ns 20 I/O Pins 8 macorcells 8 reg RoHS:否 制造商:Atmel 邏輯系列:ATF16V8BQL 最大工作頻率:62 MHz 可編程輸入/輸出端數(shù)量:20 電源電流:20 mA 延遲時間:15 ns 每個宏指令的積項數(shù):8 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 大電池數(shù)量:8 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 安裝風格:Through Hole 封裝 / 箱體:PDIP-20 |
| ATF16V8B-10NM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| ATF16V8B-10NM/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
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