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參數(shù)資料
| 型號： | ATF16V8CZ-15XC |
| 廠商： | Atmel |
| 文件頁數(shù)： | 2/26頁 |
| 文件大小： | 0K |
| 描述： | IC PLD 15NS 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 74 |
| 系列： | 16V8 |
| 可編程類型： | EE PLD |
| 宏單元數(shù)： | 8 |
| 輸入電壓： | 5V |
| 速度： | 15ns |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 其它名稱： | ATF16V8CZ15XC |
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10
0453H–PLD–7/05
ATF16V8CZ
8.
Macrocell Configuration
Software compilers support the three different OMC modes as different device types. These
device types are listed in the table below. Most compilers have the ability to automatically select
the device type, generally based on the register usage and output enable (OE) usage. Register
usage on the device forces the software to choose the registered mode. All combinatorial out-
puts with OE controlled by the product term will force the software to choose the complex mode.
The software will choose the simple mode only when all outputs are dedicated combinatorial
without OE control. The different device types listed in the table can be used to override the
automatic device selection by the software. For further details, refer to the compiler software
manuals.
When using compiler software to configure the device, the user must pay special attention to the
following restrictions in each mode.
In registered mode pin 1 and pin 11 are permanently configured as clock and output enable,
respectively. These pins cannot be configured as dedicated inputs in the registered mode.
In complex mode pin 1 and pin 11 become dedicated inputs and use the feedback paths of pin
19 and pin 12 respectively. Because of this feedback path usage, pin 19 and pin 12 do not have
the feedback option in this mode.
In simple mode all feedback paths of the output pins are routed via the adjacent pins. In doing
so, the two inner most pins (pins 15 and 16) will not have the feedback option as these pins are
always configured as dedicated combinatorial output.
8.1
ATF16V8CZ Registered Mode
PAL Device Emulation/PAL Replacement. The registered mode is used if one or more regis-
ters are required. Each macrocell can be configured as either a registered or combinatorial
output or I/O, or as an input. For a registered output or I/O, the output is enabled by the OE pin,
and the register is clocked by the CLK pin. Eight product terms are allocated to the sum term.
For a combinatorial output or I/O, the output enable is controlled by a product term, and seven
product terms are allocated to the sum term. When the macrocell is configured as an input, the
output enable is permanently disabled.
Any register usage will make the compiler select this mode. The following registered devices can
be emulated using this mode:
16R8
16RP8
16R6
16RP6
16R4
16RP4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ATF20V8BQL-15PU | IC PLD 15NS 24DIP |
| ATF22LV10C-15XC | IC PLD 15NS 24TSSOP |
| ATF22LV10CZ-25XC | IC PLD 25NS 24TSSOP |
| ATF22V10BQ-15SI | IC PLD EE 15NS QTR PWR 24-SOIC |
| ATF22V10C-15XC | IC PLD EE HP 15NS 24-TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATF16V8CZ-15XI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:High Performance E2 PLD |
| ATF16V8CZ-15XU | 功能描述:SPLD - 簡單可編程邏輯器件 EEPLD 250 GATE ZERO PWR 5V 15NS COM TEMP RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ATF20135 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | JFET | N-CHANNEL | SOT-173VAR |
| ATF20LV8C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| ATF20LV8CZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
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