參數(shù)資料
型號(hào): ATMEGA325-16MUR
廠商: Atmel
文件頁(yè)數(shù): 56/85頁(yè)
文件大小: 0K
描述: MCU AVR 32K FLASH 16MHZ 64QFN
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 4,000
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 16MHz
連通性: SPI,UART/USART,USI
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 54
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤(pán)
包裝: 帶卷 (TR)
31
2570N–AVR–05/11
ATmega325/3250/645/6450
Figure 9-3.
External Clock Drive Configuration
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. It is required to ensure that the
MCU is kept in Reset during such changes in the clock frequency.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to “System Clock Prescaler” on page
32 for details.
9.7
Clock Output Buffer
When the CKOUT Fuse is programmed, the system Clock will be output on CLKO. This mode is
suitable when the chip clock is used to drive other circuits on the system. The clock will be out-
put also during reset and the normal operation of I/O pin will be overridden when the fuse is
programmed. Any clock source, including internal RC Oscillator, can be selected when CLKO
serves as clock output. If the System Clock Prescaler is used, it is the divided system clock that
is output when the CKOUT Fuse is programmed.
9.8
Timer/Counter Oscillator
Atmel ATmega325/3250/645/6450 share the Timer/Counter Oscillator Pins (TOSC1 and
TOSC2) with XTAL1 and XTAL2. This means that the Timer/Counter Oscillator can only be used
when the calibrated internal RC Oscillator is selected as system clock source. The Oscillator is
optimized for use with a 32.768kHz watch crystal. See Figure 9-2 on page 28 for crystal
connection.
Table 9-10.
Start-up Times for the External Clock Selection
SUT1..0
Start-up Time from Power-
down and Power-save
Additional Delay from
Reset (V
CC = 5.0V)
Recommended Usage
00
6 CK
14CK
BOD enabled
01
6 CK
14CK + 4.1ms
Fast rising power
10
6 CK
14CK + 65ms
Slowly rising power
11
Reserved
NC
EXTERNAL
CLOCK
SIGNAL
XTAL2
XTAL1
GND
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