參數(shù)資料
型號: ATMEGA644PA-MUR
廠商: Atmel
文件頁數(shù): 77/160頁
文件大?。?/td> 0K
描述: IC MCU AVR 64K FLASH 44VQFN
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
megaAVR Introduction
標(biāo)準(zhǔn)包裝: 4,000
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VFQFN 裸露焊盤
包裝: 帶卷 (TR)
其它名稱: ATMEGA644PA-MUR-ND
ATMEGA644PA-MURTR
23
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
8.5
I/O memory
The I/O space definition of the Atmel
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P is shown in ”Register summary”
All ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P I/Os and peripherals are placed
in the I/O space. All I/O locations may be accessed by the LD/LDS/LDD and ST/STS/STD
instructions, transferring data between the 32 general purpose working registers and the I/O
space. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the
SBI and CBI instructions. In these registers, the value of single bits can be checked by using the
SBIS and SBIC instructions. Refer to the instruction set section for more details. When using the
I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to
these addresses. The ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P is a com-
plex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P contains three General Pur-
pose I/O Registers, see ”Register Description” on page 24. These registers can be used for
storing any information, and they are particularly useful for storing global variables and Status
Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly bit-
accessible using the SBI, CBI, SBIS, and SBIC instructions.
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