參數(shù)資料
型號: ATMEGA649V-8MI
廠商: Atmel
文件頁數(shù): 50/146頁
文件大?。?/td> 0K
描述: IC AVR MCU FLASH 64K 1.8V 64QFN
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 260
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART,USI
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 托盤
PIC16(L)F1825/1829
DS41440C-page 296
2010-2012 Microchip Technology Inc.
26.1.1.5
TSR Status
The TRMT bit of the TXSTA register indicates the
status of the TSR register. This is a read-only bit. The
TRMT bit is set when the TSR register is empty and is
cleared when a character is transferred to the TSR
register from the TXREG. The TRMT bit remains clear
until all bits have been shifted out of the TSR register.
No interrupt logic is tied to this bit, so the user has to
poll this bit to determine the TSR status.
26.1.1.6
Transmitting 9-bit Characters
The EUSART supports 9-bit character transmissions.
When the TX9 bit of the TXSTA register is set, the
EUSART will shift nine bits out for each character
transmitted. The TX9D bit of the TXSTA register is the
ninth, and Most Significant, data bit. When transmitting
9-bit data, the TX9D data bit must be written before
writing the eight Least Significant bits into the TXREG.
All nine bits of data will be transferred to the TSR shift
register immediately after the TXREG is written.
A special 9-bit Address mode is available for use with
multiple receivers. See Section 26.1.2.7 “Address
for more information on the address mode.
26.1.1.7
Asynchronous Transmission Setup:
1.
Initialize the SPBRGH, SPBRGL register pair and
the BRGH and BRG16 bits to achieve the desired
.
2.
Enable the asynchronous serial port by clearing
the SYNC bit and setting the SPEN bit.
3.
If 9-bit transmission is desired, set the TX9
control bit. A set ninth data bit will indicate that
the eight Least Significant data bits are an
address when the receiver is set for address
detection.
4.
Set SCKP bit if inverted transmit is desired.
5.
Enable the transmission by setting the TXEN
control bit. This will cause the TXIF interrupt bit
to be set.
6.
If interrupts are desired, set the TXIE interrupt
enable bit of the PIE1 register. An interrupt will
occur immediately provided that the GIE and
PEIE bits of the INTCON register are also set.
7.
If 9-bit transmission is selected, the ninth bit
should be loaded into the TX9D data bit.
8.
Load 8-bit data into the TXREG register. This
will start the transmission.
FIGURE 26-3:
ASYNCHRONOUS TRANSMISSION
Note:
The TSR register is not mapped in data
memory, so it is not available to the user.
Word 1
Stop bit
Word 1
Transmit Shift Reg.
Start bit
bit 0
bit 1
bit 7/8
Write to TXREG
Word 1
BRG Output
(Shift Clock)
TX/CK
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
1 TCY
pin
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ATMEGA64A-AN 功能描述:8位微控制器 -MCU 16MHz 105C RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATMEGA64A-ANR 功能描述:8位微控制器 -MCU 16MHz 105C RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATMEGA64A-AU 功能描述:8位微控制器 -MCU 64K Flsh 2K EEPROM 4K SRAM 16MHz RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT