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參數(shù)資料
| 型號： | ATmega8535 |
| 廠商： | Atmel Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash |
| 中文描述： | 位AVR微控制器具有8K字節(jié)的系統(tǒng)內(nèi)可編程閃存 |
| 文件頁數(shù)： | 36/152頁 |
| 文件大?。?/td> | 2528K |
| 代理商： | ATMEGA8535 |
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130
2486AA–AVR–02/2013
ATmega8(L)
The dashed boxes in the block diagram separate the three main parts of the USART (listed from
the top): Clock generator, Transmitter and Receiver. Control Registers are shared by all units.
The clock generation logic consists of synchronization logic for external clock input used by syn-
chronous slave operation, and the baud rate generator. The XCK (transfer clock) pin is only
used by synchronous transfer mode. The Transmitter consists of a single write buffer, a serial
Shift Register, Parity Generator and control logic for handling different serial frame formats. The
write buffer allows a continuous transfer of data without any delay between frames. The
Receiver is the most complex part of the USART module due to its clock and data recovery
units. The recovery units are used for asynchronous data reception. In addition to the recovery
units, the Receiver includes a parity checker, control logic, a Shift Register and a two level
receive buffer (UDR). The Receiver supports the same frame formats as the Transmitter, and
can detect Frame Error, Data OverRun and Parity Errors.
AVR USART vs. AVR
UART – Compatibility
The USART is fully compatible with the AVR UART regarding:
Bit locations inside all USART Registers
Baud Rate Generation
Transmitter Operation
Transmit Buffer Functionality
Receiver Operation
However, the receive buffering has two improvements that will affect the compatibility in some
special cases:
A second Buffer Register has been added. The two Buffer Registers operate as a circular
FIFO buffer. Therefore the UDR must only be read once for each incoming data! More
important is the fact that the Error Flags (FE and DOR) and the ninth data bit (RXB8) are
buffered with the data in the receive buffer. Therefore the status bits must always be read
before the UDR Register is read. Otherwise the error status will be lost since the buffer state
is lost
The Receiver Shift Register can now act as a third buffer level. This is done by allowing the
received data to remain in the serial Shift Register (see Figure 61 on page 129) if the Buffer
Registers are full, until a new start bit is detected. The USART is therefore more resistant to
Data OverRun (DOR) error conditions
The following control bits have changed name, but have same functionality and register location:
CHR9 is changed to UCSZ2
OR is changed to DOR
Clock Generation
The clock generation logic generates the base clock for the Transmitter and Receiver. The
USART supports four modes of clock operation: normal asynchronous, double speed asynchro-
nous, Master synchronous and Slave Synchronous mode. The UMSEL bit in USART Control
and Status Register C (UCSRC) selects between asynchronous and synchronous operation.
Double speed (Asynchronous mode only) is controlled by the U2X found in the UCSRA Regis-
ter. When using Synchronous mode (UMSEL = 1), the Data Direction Register for the XCK pin
(DDR_XCK) controls whether the clock source is internal (Master mode) or external (Slave
mode). The XCK pin is only active when using Synchronous mode.
Figure 62 on page 131 shows a block diagram of the clock generation logic.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATmega8535-16AC | 功能描述:8位微控制器 -MCU AVR 8K FLASH 512B SRAM 512B EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATMEGA8535-16AI | 功能描述:8位微控制器 -MCU AVR 8K FLASH 512B SRAM 512B EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATMEGA8535-16AJ | 功能描述:IC MCU AVR 8K 5V 16MHZ 44-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:AVR® ATmega 標準包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設(shè)備:POR，WDT 輸入/輸出數(shù):32 程序存儲器容量:32KB（32K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| ATmega8535-16AU | 功能描述:8位微控制器 -MCU 8kB Flash 0.5kB EEPROM 32 I/O Pins RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATMEGA8535-16AUR | 功能描述:8位微控制器 -MCU AVR 8K FLSH 544B SRAM 512B EE-16MHz RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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