參數(shù)資料
型號: ATS635LSETN-T
廠商: Allegro Microsystems Inc
文件頁數(shù): 9/16頁
文件大?。?/td> 546K
描述: IC SENSOR GEAR TOOTH 4-SIP
產(chǎn)品培訓(xùn)模塊: Current Sensor
標(biāo)準(zhǔn)包裝: 450
傳感范圍: 0.25mm ~ 6mm
類型: 線性 - 可編程
電源電壓: 4.2 V ~ 24 V
電流 - 電源: 5.5mA
電流 - 輸出(最大): 20mA
輸出類型: 數(shù)字,開路集電極
特點: 可編程
工作溫度: -40°C ~ 150°C
封裝/外殼: 4-SIP
供應(yīng)商設(shè)備封裝: 4-SIP
包裝: 帶卷 (TR)
Programmable Back Biased Hall-Effect
Switch with TPOS Functionality
8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ATS636LSE
Functional Description
Chopper-Stabilized Technique
The basic Hall element is a small sheet of semiconductor material
in which a constant bias current will flow when a constant volt-
age source is applied. The output will take the form of a voltage
measured across the width of the sheet and will have negligible
value in the absence of a magnetic field. When a magnetic field
with flux lines at right angles to the Hall current is applied, a
small signal voltage directly proportional to the strength of the
magnetic field will occur at the output terminals.
This signal voltage is proportionally small relative to the offset
produced at the input of the chip. This makes it very difficult
to process the signal and maintain an accurate, reliable output
over the specified temperature and voltage range. Therefore, it is
important to reduce any offset on the signal that could be ampli-
fied when the signal is processed.
Chopper stabilization is a unique approach used to minimize
input offset on the chip. This technique removes a key source of
output drift with temperature and stress, and produces a 3?reduc-
tion in offset over other conventional methods.
This offset reduction chopping technique is based on a signal
modulation-demodulation process. The undesired offset signal is
separated from the magnetically induced signal in the frequency
domain. The offset (and any low frequency noise) component of
the signal can be seen as signal corruption added after the signal
modulation process has taken place. Therefore, the DC offset is
not modulated and remains a low frequency component. Con-
sequently, the signal demodulation process acts as a modulation
process for the offset causing the magnetically induced signal
to recover its original spectrum at baseband while the DC offset
becomes a high frequency signal. Then, using a low pass filter,
the signal passes while the modulated DC offset is suppressed.
The advantage of this approach is significant offset reduction,
which desensitizes the chip against the effects of temperature and
stress. The disadvantage is that this technique features a demodu-
lator that uses a sample and hold block to store and recover the
signal. This sampling process can slightly degrade the signal-to-
noise Ratio (SNR) by producing replicas of the noise spectrum at
the baseband. The degradation is a function of the ratio between
the white noise spectrum and the sampling frequency. The effect
of the degradation of the SNR is higher jitter, a.k.a. signal repeat-
ability. In comparison to a continuous time device, the jitter spec
can be increased by a factor of five.
Regulator
Amplifier
Sample/
Hold
Clock
Hall Element
Figure 1. Concept of Chopper-Stabilization Algorithm
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